AIDA FMC Mini-TLU
Firmware for FMC-based mini-TLU (Trigger/Timing/Tagging Logic Unit) for AIDA
 All Classes Files Functions Variables Pages
serdes_1_to_n_SDR Entity Reference

Entities

Behavioral  architecture
 

Libraries

unisim 

Use Clauses

vcomponents 

Generics

g_S  integer := 4
 Parameter to set the serdes factor 1..8.

Ports

clk_i   in std_logic
 Fast clock to sample data (640MHz)
hclk_i   in std_logic
 A quarter frequency clock (160MHz)
reset_i   in std_logic
 reset signal
Data_i   in std_logic
 1-Bit Input data
strobe_i   in std_logic
 Iserdes strobe_i.
Data_o   out std_logic_vector ( 2 * g_S - 1 downto 0 )
 data output

The documentation for this class was generated from the following file: