\chapter{Functions}\label{ch:functions}
The following is a list of files containing the code for the \gls{tlu}:
\begin{itemize}
  \item \verb|./eudaq2/user/eudet/misc/fmctlu_runcontrol.ini|:\newline initialization file for the hardware. The location of the file can be passed to the EUDAQ code in the \gls{gui}.
  \item \verb|./eudaq2/user/eudet/misc/fmctlu_runcontrol.conf|:\newline configuration file. It contains all the parameters to be loaded in the \gls{tlu} at the beginning of the run. If this file is not found, EUDAQ will use a list of default settings. The location of the file (and its name) can be passed to the EUDAQ code in the \gls{gui}.
  \item \verb|./eudaq2/user/eudet/misc/fmctlu_connection.xml|:\newline define the IP address and address map of the \gls{tlu}. The one listed is the default location for the file. A different location can be specified with the \verb|ConnectionFile| option in the \emph{conf} file for the \gls{tlu}.
  \item \verb|./eudaq2/user/eudet/misc/fmctlu_address.xml|:\newline address map for the \gls{tlu}. The location of the file is specified in the \verb|fmctlu_connection.xml| file.
  \item \verb|./eudaq2/user/eudet/misc/fmctlu_clock_config.txt|:\newline configuration for the Si5345 clock chip. In order for the hardware to work a configuration file must be present. Those listed are the default name and location for the file; a different file can be specified with the \verb|CLOCK_CFG_FILE| option in the \emph{conf} file for the \gls{tlu}.
  \item \verb|./eudaq2/user/eudet/module/src/FMCTLU_Producer.cc|:\newline eudaq producer for the \gls{tlu}. Contains the methods to initialize, configure, start, stop the \gls{tlu} producer.
  \item \verb|./eudaq2/user/eudet/hardware/src/FmctluController.cc|:\newline Contains the definition of the hardware class for the \gls{tlu} and the methods to set and read from its hardware, such as clock chip, DAC, etc. This lever is abstract with respect to the actual hardware, so that if a future version of the board uses different components it should be possible to re-use this code.
  \item \verb|./eudaq2/user/eudet/hardware/include/FmctluController.hh|:\newline Headers for the controller.
  \item \verb|./eudaq2/user/eudet/hardware/src/FmctluController.cxx|:\newline Executable for the controller.
  \item \verb|./eudaq2/user/eudet/hardware/src/FmctluHardware.cc|:\newline This is the code that deals with the actual hardware on the \gls{tlu}, and contains specific instructions for the chips mounted in the current version. It contains several classes for the ADC, the clock chip, the I/O expanders etc.
  \item \verb|./eudaq2/user/eudet/hardware/include/FmctluHardware.hh|:\newline Header for the hardware.
  \item \verb|./eudaq2/user/eudet/hardware/src/FmctluI2c.cc|:\newline core functions used to read and write from \gls{i2c} compatible slaves.
  \item \verb|./eudaq2/user/eudet/hardware/include/FmctluI2c.hh|:\newline Headers for the \gls{i2c} core.
\end{itemize}

\section{Functions}
\begin{description}
  \item[enableClkLEMO] Enable or disable the output clock to the differential LEMO connector.
  \item[enableHDMI] Set the status of the transceivers for a specific HDMI connector. When enable= False the transceivers are disabled and the connector cannot send signals from FPGA to the outside world. When enable= True then signals from the FPGA will be sent out to the HDMI.\\ In the configuration file use \verb|HDMIx_on = 0| to disable a channel and \verb|HDMI1_on = 1| to enable it (x can be 1, 2, 3, 4).\\
      NOTE: the other direction is always enabled, i.e. signals from the DUTs are always sent to the FPGA.\\
      NOTE: Clock source must be defined separately using SetDutClkSrc (DUTClkSrc in python script).\\
      NOTE: this is called \verb|DUTOutputs| on the python scripts.
  \item[GetFW] dsds
  \item[getSN] dsd
  \item[I2C\_enable] dsd
  \item[InitializeClkChip]
  \item[InitializeDAC]
  \item[InitializeIOexp]
  \item[InitializeI2C]
  \item[PopFrontEvent]
  \item[ReadRRegister]
  \item[ReceiveEvents]
  \item[ResetEventsBuffer]
  \item[SetDutClkSrc] Set the clock source for a specific \gls{hdmi} connector. The source can be set to 0 (no clock), 1 (Si5345) or 2 (FPGA). In the configuration file use \verb|HDMIx_on = N| to select the source (x can be 1, 2, 3, 4, N is the clock source).\\
      NOTE: this is called \verb|DUTClkSrc| on python scripts.
  \item[SetPulseStretchPk] Takes a vector of six numbers, packs them (5-bits each) and sends them to the PulseStretch register.
  \item[SetThresholdValue]
  \item[setTrgPattern] Writes two 32-bit words to define the trigger pattern for the inputs. See section~\ref{ch:triggerinputs} for details.
  \item[SetWRegister]
  \item[SetUhalLogLevel]
\end{description}


