Commit 5be570f2 authored by Paolo Baesso's avatar Paolo Baesso

Changed some images. Corrected file names

parent d7757397
\chapter{Functions}\label{ch:functions}
The following is a list of files containing the code for the \gls{tlu}:
\begin{itemize}
\item \verb|./eudaq2/user/eudet/misc/fmctlu_runcontrol.ini|:\newline initialization file for the hardware. The location of the file can be passed to the EUDAQ code in the \gls{gui}.
\item \verb|./eudaq2/user/eudet/misc/fmctlu_runcontrol.conf|:\newline configuration file. It contains all the parameters to be loaded in the \gls{tlu} at the beginning of the run. If this file is not found, EUDAQ will use a list of default settings. The location of the file (and its name) can be passed to the EUDAQ code in the \gls{gui}.
\item \verb|./eudaq2/user/eudet/misc/fmctlu_connection.xml|:\newline define the IP address and address map of the \gls{tlu}. The one listed is the default location for the file. A different location can be specified with the \verb|ConnectionFile| option in the \emph{conf} file for the \gls{tlu}.
\item \verb|./eudaq2/user/eudet/misc/fmctlu_address.xml|:\newline address map for the \gls{tlu}. The location of the file is specified in the \verb|fmctlu_connection.xml| file.
\item \verb|./eudaq2/user/eudet/misc/fmctlu_clock_config.txt|:\newline configuration for the Si5345 clock chip. In order for the hardware to work a configuration file must be present. Those listed are the default name and location for the file; a different file can be specified with the \verb|CLOCK_CFG_FILE| option in the \emph{conf} file for the \gls{tlu}.
\item \verb|./eudaq2/user/eudet/misc/aida_tlu_test.ini|:\newline initialization file for the hardware. The location of the file can be passed to the EUDAQ code in the \gls{gui}.
\item \verb|./eudaq2/user/eudet/misc/aida_tlu_test.conf|:\newline configuration file. It contains all the parameters to be loaded in the \gls{tlu} at the beginning of the run. If this file is not found, EUDAQ will use a list of default settings. The location of the file (and its name) can be passed to the EUDAQ code in the \gls{gui}.
\item \verb|./eudaq2/user/eudet/misc/aida_tlu_test_connection.xml|:\newline define the IP address and address map of the \gls{tlu}. The one listed is the default location for the file. A different location can be specified with the \verb|ConnectionFile| option in the \emph{conf} file for the \gls{tlu}.
\item \verb|./eudaq2/user/eudet/misc/aida_tlu_test_address.xml|:\newline address map for the \gls{tlu}. The location of the file is specified in the \verb|fmctlu_connection.xml| file.
\item \verb|./eudaq2/user/eudet/misc/aida_tlu_test_clock_config.txt|:\newline configuration for the Si5345 clock chip. In order for the hardware to work a configuration file must be present. Those listed are the default name and location for the file; a different file can be specified with the \verb|CLOCK_CFG_FILE| option in the \emph{conf} file for the \gls{tlu}.
\item \verb|./eudaq2/user/eudet/module/src/FMCTLU_Producer.cc|:\newline eudaq producer for the \gls{tlu}. Contains the methods to initialize, configure, start, stop the \gls{tlu} producer.
\item \verb|./eudaq2/user/eudet/hardware/src/FmctluController.cc|:\newline Contains the definition of the hardware class for the \gls{tlu} and the methods to set and read from its hardware, such as clock chip, DAC, etc. This lever is abstract with respect to the actual hardware, so that if a future version of the board uses different components it should be possible to re-use this code.
\item \verb|./eudaq2/user/eudet/hardware/include/FmctluController.hh|:\newline Headers for the controller.
\item \verb|./eudaq2/user/eudet/hardware/src/FmctluController.cxx|:\newline Executable for the controller.
\item \verb|./eudaq2/user/eudet/hardware/src/FmctluHardware.cc|:\newline This is the code that deals with the actual hardware on the \gls{tlu}, and contains specific instructions for the chips mounted in the current version. It contains several classes for the ADC, the clock chip, the I/O expanders etc.
\item \verb|./eudaq2/user/eudet/hardware/include/FmctluHardware.hh|:\newline Header for the hardware.
\item \verb|./eudaq2/user/eudet/hardware/src/FmctluI2c.cc|:\newline core functions used to read and write from \gls{i2c} compatible slaves.
\item \verb|./eudaq2/user/eudet/hardware/include/FmctluI2c.hh|:\newline Headers for the \gls{i2c} core.
\item \verb|./eudaq2/user/eudet/hardware/src/AidaTluController.cc|:\newline Contains the definition of the hardware class for the \gls{tlu} and the methods to set and read from its hardware, such as clock chip, DAC, etc. This lever is abstract with respect to the actual hardware, so that if a future version of the board uses different components it should be possible to re-use this code.
\item \verb|./eudaq2/user/eudet/hardware/include/AidaTluController.hh|:\newline Headers for the controller.
\item \verb|./eudaq2/user/eudet/hardware/src/AidaTluController.cxx|:\newline Executable for the controller.
\item \verb|./eudaq2/user/eudet/hardware/src/AidaTluHardware.cc|:\newline This is the code that deals with the actual hardware on the \gls{tlu}, and contains specific instructions for the chips mounted in the current version. It contains several classes for the ADC, the clock chip, the I/O expanders etc.
\item \verb|./eudaq2/user/eudet/hardware/include/AidaTluHardware.hh|:\newline Header for the hardware.
\item \verb|./eudaq2/user/eudet/hardware/src/AidaTluI2c.cc|:\newline core functions used to read and write from \gls{i2c} compatible slaves.
\item \verb|./eudaq2/user/eudet/hardware/include/AidaTluI2c.hh|:\newline Headers for the \gls{i2c} core.
\end{itemize}
\section{Functions}
......
......@@ -14,10 +14,13 @@ Whenever a global trigger is generated by the unit, a 48-bit coarse time-stamp i
The configuration parameters and data are sent and received via the \href{https://www.ohwr.org/projects/ipbus}{IPbus} which provides a simple way to control and communicate TCA-based hardware via the UDP/IP protocol.\\
The \gls{tlu} is shipped with an \gls{fpga} board already programmed with the latest version of the firmware needed to operate the unit. New features and bug fixes are continuously being implemented by the developing team and it is possible to flash the unit with a new firmware as described in section~\ref{ch:flashFPGA}.\\
The unit requires 12~V to operate. Power can be provided using the circular socket located on the back panel. See section~\ref{ch:backpanelintro} for details on compatible connectors.\\
During normal operation the current drawn by the unit is about 1~A.
During normal operation the current drawn by the unit is about 1~A.\\
\section{Front panel}\label{ch:frontpanel}
The front panel of the \gls{tlu} is shown in figure~\ref{fig:frontpanel}; from left to right, the main elements are:
\section{Hardware modules}\label{ch:hardwaretypes}
The unit is provided in two different configurations: a table-top enclosure and a 19"-rack mount enclosure. The difference is only cosmetic; the hardware inside the unit is identical\footnote{With the only exception that the 10"-rack unit has and additional \gls{lcd}.} so the information contained in the rest of this manual apply to both types of \gls{tlu} unless otherwise specified.
\subsection{Table-top unit: front panel}\label{ch:frontpanel}
The front panel of the \gls{tlu} is shown in figure~\ref{fig:tabletop} (top); from left to right, the main elements are:
\begin{itemize}
\item \gls{sfp} cage
\item 4 \gls{hdmi} connectors for devices under test. Each connector has a \gls{rgb} LED used to indicate the port status (see section~\ref{ch:frontpanelintro}).
......@@ -32,13 +35,13 @@ The front panel of the \gls{tlu} is shown in figure~\ref{fig:frontpanel}; from l
\end{itemize}
\begin{figure}
\centering
\includegraphics[width=.950\textwidth]{./Images/frontPanel.pdf}
\caption{View of the TLU front panel.}
\label{fig:frontpanel}
\includegraphics[width=.990\textwidth]{./Images/TLU_front_back.pdf}
\caption{View of the table-top TLU front (top) and back (bottom) panels.}
\label{fig:tabletop}
\end{figure}
\section{Back panel}\label{ch:backpanelintro}
The \gls{tlu} back panel is shown in figure~\ref{fig:backpanel}; from left to right, the main elements are:
\subsection{Table-top unit: back panel}\label{ch:backpanelintro}
The \gls{tlu} back panel is shown in figure~\ref{fig:tabletop} (bottom); from left to right, the main elements are:
\begin{itemize}
\item RJ45 connector: this is the connector used to communicate with the hardware using IPBus.
\item \gls{usb}-B port used to flash the internal logic with a new version of the firmware. See section\ref{ch:fpgahardware} for details.
......@@ -48,13 +51,23 @@ The \gls{tlu} back panel is shown in figure~\ref{fig:backpanel}; from left to ri
\item \gls{usb}-B port used to communicate with the \gls{fpga} \gls{uart} port.
\item Power connector\footnote{All TLUs shipped after 17/06/2018 use Switchcraft 721A; mates with a $\phi$~5.5 mm jack with $\phi$~2.5 mm central pin. For instance use Lumberg 1634 02.\\ TLUs shipped before that date use Switchcraft 722A instead, which mates with a $\phi$~5.5 mm jack with $\phi$~2.1 mm central pin. For instance use Lumberg 1633 02. Only 3 units are currently still using the 2.1~mm connector.}. Central pin is +12 V. It is recommended to use a power supply capable of providing at least 1~A.
\end{itemize}
A cooling fan is also mounted on the back panel.
\subsection{Rack mount unit: front and back panels}\label{ch:rackmountpanel}
The front and back panels for the 19"-rack unit are shown in figure~\ref{fig:rackmountpanels}. All the components are identical to those of the table-top enclosure with the following exceptions:
\begin{itemize}
\item this version has a \gls{lcd} used to display information.
\item the unit is powered with 220~V (AC) instead of 12~V (DC). A standard mains lead\footnote{IEC 60320 type C13.} is required.
\item The \gls{usb} ports are placed on the front of the unit leaving only the RJ45 and power connectors on the back.
\item A power switch is located on the front panel.
\end{itemize}
\begin{figure}
\centering
\includegraphics[width=.950\textwidth]{./Images/backPaneldoc.pdf}
\caption{View of the TLU back panel.}
\label{fig:backpanel}
\includegraphics[width=.990\textwidth]{./Images/TLU_19rack.pdf}
\caption{View of the 10"-rack mount TLU front (top) and back (bottom) panels.}
\label{fig:rackmountpanels}
\end{figure}
A cooling fan (not shown in figure~\ref{fig:backpanel} is also mounted on the back panel.
\section{Setup}\label{ch:setup}
At the moment of shipping, each \gls{tlu} is pre-configured with the most recent version of the firmware. It is therefore possible to power the unit and start using it almost immediately. The following steps are required to use the unit:
......@@ -114,7 +127,7 @@ This will open a new window, shown in figure~\ref{fig:hw_eeprom}, from which it
\end{figure}
Make sure that the options are set as shown in figure~\ref{fig:hw_eeprom}.
\section{Inspection}\label{ch:inspection}
\section{Inspection (table top unit)}\label{ch:inspection}
At some point someone, somewhere, will want to disassemble the unit to poke at its internal electronics; the top cover of the unit can only slide away when either the front or back frame are removed.
\begin{alertinfo}{Note}
Simply removing the corner screws on the panels will only allow to remove the plates but not accessing the inside of the unit.
......@@ -138,6 +151,9 @@ The same procedure can be repeated with the front frame, if necessary. In this c
\caption{Steps to remove the cover from the unit.}
\label{fig:dismantle}
\end{figure}
\section{Inspection (19"-rack unit)}
Accessing the hardware on the 19"-unit is more straightforward: simply remove the four M2.5 Pozi screws located on the top panel and slide the panel away. Please note that this unit has an internal AC-DC converter that can potentially store an harmful amount of energy even when powered-off and disconnected from the mains: always use care when accessing the unit.
%\section{Preparation}
%Before powering the \gls{tlu} it is necessary to follow a few steps to ensure the board and the \gls{fpga} work correctly.\\
%
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