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AIDA-2020 TLU - Gateware
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AIDA-2020 TLU - Gateware
Commits
eb9752c5
Commit
eb9752c5
authored
Feb 19, 2014
by
David Cussans
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silly syntax error
parent
38bed363
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triggerInputs_rtl.vhd
hdl/common/triggerInputs_rtl.vhd
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hdl/common/triggerInputs_rtl.vhd
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eb9752c5
...
...
@@ -55,7 +55,7 @@ ENTITY triggerInputs IS
);
PORT
(
cfd_discr_p_i
:
IN
std_logic_vector
(
g_NUM_INPUTS
-1
DOWNTO
0
);
--! Inputs from constant-fraction discriminators
cfd_discr_n_i
:
IN
std_logic_vector
(
g_NUM_INPUTS
-1
DOWNTO
0
);
--! Input from CFD
cfd_discr_n_i
:
IN
std_logic_vector
(
g_NUM_INPUTS
-1
downto
0
);
--! Input from CFD
clk_4x_logic
:
IN
std_logic
;
--! Rising edge active. By default = 4*40MHz = 160MHz
strobe_4x_logic_i
:
IN
std_logic
;
--! Pulses high once every 4 cycles of clk_4x_logic
threshold_discr_p_i
:
IN
std_logic_vector
(
g_NUM_INPUTS
-1
DOWNTO
0
);
--! inputs from threshold comparators
...
...
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