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AIDA-2020 TLU - Gateware
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AIDA-2020 TLU - Gateware
Commits
c0c02dcb
Commit
c0c02dcb
authored
Jan 22, 2019
by
David Cussans
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Updated build script
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f5c7ab6b
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build_tlu_firmware.sh
AIDA_tlu/scripts/build_tlu_firmware.sh
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AIDA_tlu/scripts/build_tlu_firmware.sh
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c0c02dcb
#!/bin/sh
IPBUS_BRANCH
=
"enhancement/68"
mkdir
work
cd
work
git clone git@github.com:ipbus/ipbb.git
#
git clone git@github.com:ipbus/ipbb.git
# ( ... or curl -L https://github.com/ipbus/ipbb/archive/v0.2.5.tar.gz | tar xvz )
curl
-L
https://github.com/ipbus/ipbb/archive/v0.3.11.tar.gz |
tar
xvz
ln
-s
ipbb-0.3.11 ipbb
source
ipbb/env.sh
ipbb init build
cd
build
ipbb add git https://github.com/ipbus/ipbus-firmware.git
-b
enhancement/28
ipbb add git git@github.com:DavidCussans/firmware_AIDA.git
ipbb add git https://github.com/ipbus/ipbus-firmware.git
-b
${
IPBUS_BRANCH
}
ipbb add git git://ohwr.org/fmc-projects/fmc-mtlu/fmc-mtlu-gw.git
# For read/write load a valid ssh key and use
# ipbb add git ssh://git@ohwr.org/fmc-projects/fmc-mtlu/fmc-mtlu-gw.git
# In order to generate the VHDL to decode the addresses follow the instructions at https://ipbus.web.cern.ch/ipbus/doc/user/html/firmware/hwDevInstructions.html
echo
"Generating address table VHDL from XML file"
pushd
src/f
irmware_AIDA
/projects/TLU_v1e/addr_table
pushd
src/f
mc-mtlu-gw/AIDA_tlu
/projects/TLU_v1e/addr_table
pwd
/opt/cactus/bin/uhal/tools/gen_ipbus_addr_decode
-v
TLUaddrmap.xml
#copy resulting file ( ipbus_decode_TLUaddrmap.vhd ) to work/build/src/f
irmware_AIDA
/projects/TLU_v1e/firmware/hdl/
cp
ipbus_decode_TLUaddrmap.vhd ../firmware/hdl/
#copy resulting file ( ipbus_decode_TLUaddrmap.vhd ) to work/build/src/f
mc-mtlu-gw/AIDA_tlu
/projects/TLU_v1e/firmware/hdl/
mv
ipbus_decode_TLUaddrmap.vhd ../firmware/hdl/
popd
# Edit the files in the IPBus repostitory to expose the 200MHz clock
...
...
@@ -29,17 +34,17 @@ sed -i 's/clk125_o: out std_logic/clk125_o, clk_200_o: out std_logic/' src/ipbus
# Comment out the cfg signals in the IPBus constraints file enclustra_ax3_pm3.tcl
echo
"BUILD: patching /enclustra_ax3_pm3.patch"
pushd
src/ipbus-firmware/boards/enclustra_ax3_pm3/base_fw/synth/firmware/ucf
patch < ../../../../../../../f
irmware_AIDA
/boards/enclustra_ax3_pm3/base_fw/synth/firmware/ucf/enclustra_ax3_pm3.patch
patch < ../../../../../../../f
mc-mtlu-gw/AIDA_tlu
/boards/enclustra_ax3_pm3/base_fw/synth/firmware/ucf/enclustra_ax3_pm3.patch
popd
echo
"BUILD: ipbb proj create"
ipbb proj create vivado TLU_1e f
irmware_AIDA:
projects/TLU_v1e
-t
top_tlu_1e_a35.dep
ipbb proj create vivado TLU_1e f
mc-mtlu-gw:AIDA_tlu/
projects/TLU_v1e
-t
top_tlu_1e_a35.dep
cd
proj/TLU_1e
ipbb vivado project
# Set correct file as design "top"
#echo "BUILD: Setting the correct design as top"
#vivado -mode tcl -nojournal -nolog -notrace -source ../../src/f
irmware_AIDA
/projects/TLU_v1e/firmware/cfg/set_top.tcl top/top.xpr
#vivado -mode tcl -nojournal -nolog -notrace -source ../../src/f
mc-mtlu-gw/AIDA_tlu
/projects/TLU_v1e/firmware/cfg/set_top.tcl top/top.xpr
echo
"BUILD: ipbb impl"
...
...
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