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AIDA-2020 TLU - Gateware
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AIDA-2020 TLU - Gateware
Commits
b02c3a4f
Commit
b02c3a4f
authored
Apr 03, 2014
by
Alvaro Dosil
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fix bug in ipbus connection
parent
3ffc883a
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2 changed files
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2 additions
and
2 deletions
+2
-2
eventFormatter_rtl.vhd
hdl/common/eventFormatter_rtl.vhd
+1
-0
top_extphy_struct.vhd
hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/top_extphy_struct.vhd
+1
-2
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hdl/common/eventFormatter_rtl.vhd
View file @
b02c3a4f
...
...
@@ -181,6 +181,7 @@ BEGIN
ipbus_o
.
ipb_ack
<=
s_ipbus_ack
;
ipbus_o
.
ipb_err
<=
'0'
;
-----------------------------------------------------------------------------
-- IPBUS read
...
...
hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/top_extphy_struct.vhd
View file @
b02c3a4f
...
...
@@ -128,7 +128,6 @@ ARCHITECTURE struct OF top_extphy IS
SIGNAL
event_number_o
:
std_logic_vector
(
g_IPBUS_WIDTH
-1
DOWNTO
0
);
-- starts at one. Increments for each post_veto_trigger
SIGNAL
ipbr
:
ipb_rbus_array
(
g_NUM_EXT_SLAVES
-1
DOWNTO
0
);
--! IPBus read signals
SIGNAL
ipbus_clk
:
std_logic
;
SIGNAL
ipbus_clk_i
:
std_logic
;
SIGNAL
ipbus_reset
:
std_logic
;
SIGNAL
ipbus_rst
:
std_logic
;
-- ! IPBus reset to slaves
SIGNAL
ipbw
:
ipb_wbus_array
(
g_NUM_EXT_SLAVES
-1
DOWNTO
0
);
--! IBus write signals
...
...
@@ -469,7 +468,7 @@ BEGIN
)
PORT
MAP
(
clk_4x_logic_i
=>
clk_4x_logic
,
ipbus_clk_i
=>
ipbus_clk
_i
,
ipbus_clk_i
=>
ipbus_clk
,
logic_strobe_i
=>
strobe_4x_logic
,
logic_reset_i
=>
logic_reset
,
trigger_i
=>
overall_trigger
,
...
...
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