
Simulation of trigger inputs

ipbb proj create sim triggerInputs_sim fmc-mtlu-gw:AIDA_tlu/components/tlu/sim -t ../../cfg/triggerInputs_newTLU_tb.dep
cd proj/triggerInputs_sim
ipbb sim setup-simlib ipcores fli
ipbb sim make-project
./vsim

Point to input and output files on command line:

vsim -voptargs=+acc work.triggerinputs_newtlu_tb(bench) -G g_BFMINPUT="/users/phdgc/tlu-tmp-2020-2-24/work/build/proj/triggerInputs_sim/BFM_INPUT_01.txt" -G g_BFMOUTPUT="/users/phdgc/tlu-tmp-2020-2-24/work/build/proj/triggerInputs_sim/BFM_OUTPUT_01.txt"

... or just
vsim work.triggerinputs_newtlu_tb -G g_BFMINPUT=BFM_INPUT_01.txt -G g_BFMOUTPUT=BFM_OUTPUT_01.txt

./vsim -c work.triggerinputs_newtlu_tb -G g_BFMINPUT=BFM_INPUT_02.txt -G g_BFMOUTPUT=BFM_OUTPUT_02.txt  -do "run -all"

Reads from input file

cmd arg1 arg2 ....


cmd =
0 IPBUS
1 RESET
2 PAUSE
3 PULSE


pulse args...

3 delay0 width0 delay1 width1 delay2 width2 delay3 width3 delay4 width4 delay5 width5

IPBus args

0 w/r/rc addr data

w/r/rc = 0 : write , 1: read , 2: read with check

Pause args ...

2 nclock_cycles

