On the V2.0, the functionality of voltage translators is affected by the presence of pull ups on the CS of DACs and ADCs, so R39, R42, R45 and R48 must be declared as NOT MOUNTED.
Schematic updated for final production
Driving of the LED related PG_C2M is active low. The circuit to drive the LED which displays the mezzanine activity should be inverted on a V3.0 PCB.
Schematic updated for final production
Mathieu Saccani (4b6cc5dd) at 29 Nov 10:58
Add an automatic DAC value recory after an disable/enable sequence
Mathieu Saccani (f57761ab) at 28 Nov 16:08
Rename a block in regulator module, change the SPI polarity in the ...
Driving of the LED related PG_C2M is active low. The circuit to drive the LED which displays the mezzanine activity should be inverted on a V3.0 PCB.
On the V2.0, the functionality of voltage translators is affected by the presence of pull ups on the CS of DACs and ADCs, so R39, R42, R45 and R48 must be declared as NOT MOUNTED.
Mathieu Saccani (fffeae73) at 24 Nov 08:55
Change the wb write strobes, add one wb slave to the regulator module
Mathieu Saccani (deed52d3) at 22 Nov 16:17
Update the memory map to align addresses per blocks for the driver ...
Mathieu Saccani (89f4e1c1) at 02 Nov 13:34
Change the polarity of FmcPresent and add clk_freq parameter
Mathieu Saccani (c316b79a) at 16 Oct 12:56
Merge branch 'master' of https://ohwr.org/project/fmc-hv-2ch
... and 1 more commit
Accordingly with the FMC standard the front panel should be electrically insulated and also anodized, but this is impossible for this project for safety and functionality reasons. The is a non conformity to the FMC standard which cannot be solved. On the CERN EDMS documentation, the front panel must have the following surface treatment : Conducting (Chromatation or RoHS compliant) - Colourless on both sides.
The issue cannot be solved because of safety reasons.
Design updated on the V2 (https://edms.cern.ch/item/EDA-04456-V2-0/0)
The PRSNT_M2C_L is the "Presence signal". Indicates that a mezzanine module is attached to the carrier. Low active (tie to GND on FMC) On the EDA-04456-V1-0 this pin is unconnected so it would be useful to connect it on the next PCB version.
Design updated on the V2 (https://edms.cern.ch/item/EDA-04456-V2-0/0)
EEPROM should be powered to 3P3VAUX
Design updated on the V2 (https://edms.cern.ch/item/EDA-04456-V2-0/0)