Add return path vias in various places
Via placement is merely indicative, it's enough to be close to the signal via and symmetrical if the signal is differential.
- To the CLK_E diff pair (L1-L6, need to tie L2 GND to L5 GND)
- To the clock selection header (L1-L4)
- To the biasing networks (only part shown)
- The CS pins of the DVGAs (only one shown)
- Differential FDA outputs (only one shown)
- Sprinkle a couple vias here, too
If I notice any more cases I'll add them below, as comments.