FMC DEL 1ns 4cha issueshttps://ohwr.org/project/fmc-delay-1ns-8cha/issues2024-01-26T14:53:34Zhttps://ohwr.org/project/fmc-delay-1ns-8cha/issues/32Cannot meet spec of 2V/ns into 50 Ohm @5V level2024-01-26T14:53:34ZErik van der BijCannot meet spec of 2V/ns into 50 Ohm @5V levelIn the specification for the Fine Delay module is written:
Output standard: 50 Ohm TTL drivers (with 2V/ns or faster rising edges).
However, on the prototype that it is very difficult to drive with 2V/ns
into a 50 Ohm signal that should swing up to 5V.Tomasz WlostowskiTomasz Wlostowskihttps://ohwr.org/project/fmc-delay-1ns-8cha/issues/33P5V0 overvoltage protection2019-02-12T09:08:09ZTomasz WlostowskiP5V0 overvoltage protectionAdd a 5.2 V TVS diode between P5V0 and GND to prevent injecting high
voltage into P5VO if the output is incorrectly connected.https://ohwr.org/project/fmc-delay-1ns-8cha/issues/34V2: FMC connector type wrong in BOM2019-02-12T09:08:10ZErik van der BijV2: FMC connector type wrong in BOMThe FMC connector J6 in the BOM is of the wrong type.
In the BOM it is currently "J6 1 AMTEC\_ASP-127797" which is a HPC, with
a wrong description of a LPC.
It should be SAMTEC\_ASP-134604-01, 160 contacts (4 rows cdgh) Surface
Mount Male Connector, VITA 57 (MC-LPC-10).
The library has been improved and the symbol of the
SAMTEC\_ASP-134604-01 is available.Tomasz WlostowskiTomasz Wlostowskihttps://ohwr.org/project/fmc-delay-1ns-8cha/issues/35T2 has too big Rdson2019-02-12T09:08:11ZTomasz WlostowskiT2 has too big RdsonThe RDSon of T2 (BST82) which is used to switch on 50 ohm termination of
trigger input is too big, resulting in too high input impedance. Replace
with a low RDSon type (for example BSH103 used in the SPEC).Tomasz WlostowskiTomasz Wlostowskihttps://ohwr.org/project/fmc-delay-1ns-8cha/issues/36V2: OHL licence 1.0 in schematics. Should be 1.1.2019-02-12T09:08:12ZErik van der BijV2: OHL licence 1.0 in schematics. Should be 1.1.The schematics of the V2 still show V1.0 as OHL licence. Should be set
to V1.1
https://edms.cern.ch/nav/P:EDA-02267:V0/I:EDA-02267-V2-0:V0/TAB4Tomasz WlostowskiTomasz Wlostowskihttps://ohwr.org/project/fmc-delay-1ns-8cha/issues/37V2: OHL licence 1.1, but in mfg doc remains 1.02019-02-12T09:08:12ZErik van der BijV2: OHL licence 1.1, but in mfg doc remains 1.0https://edms.cern.ch/file/1152921/2/EDA-02267-V2_mfg.pdf page 15 shows
still 1.0 of OHL licence. Silkscreen texts are OK with V1.1.Tomasz WlostowskiTomasz Wlostowskihttps://ohwr.org/project/fmc-delay-1ns-8cha/issues/39Front-panel not designed. Mechanical assembly missing.2019-02-12T09:08:14ZErik van der BijFront-panel not designed. Mechanical assembly missing.A front-panel should be designed. Based on the ADC card.
Also need file with the mechanical assembly (arrangement-mat,
arrangement) showing all screws and possible instructions for loc-tite.Tomasz WlostowskiTomasz Wlostowskihttps://ohwr.org/project/fmc-delay-1ns-8cha/issues/42PLL divider configuration2019-02-12T09:08:16ZTomasz WlostowskiPLL divider configurationFPGA clock should not be in the same output bank of AD9516 as TDC REF
clock to have more flexibility with configuring the dividers.https://ohwr.org/project/fmc-delay-1ns-8cha/issues/43PLL oscillator coupling2019-02-12T09:08:17ZTomasz WlostowskiPLL oscillator couplingVCTCXO output should be AC-coupled with the PLL REF input.