Commits · fbf8487150c79fd04a8fa17d938ec81e1f77aea4 · Projects / FMC DEL 1ns 4cha · Open Hardware Repository

15 Oct, 2019 1 commit
- hdl: updated submodules · fbf84871
  Tomasz Wlostowski authored Oct 15, 2019
  
  fbf84871
11 Sep, 2019 5 commits
- syn/spec: ISE project for SPEC top level compliant with The Convention · 018715ac
  Tomasz Wlostowski authored Sep 11, 2019
  
  018715ac
- top/spec: SPEC top level compliant with The Convention · 6192e6db
  Tomasz Wlostowski authored Sep 11, 2019
  
  6192e6db
- rtl: added FMC_SLOT_ID register · b29188b3
  Tomasz Wlostowski authored Sep 11, 2019
  
  b29188b3
- rtl: tie unused int line · 4a39c5d8
  Tomasz Wlostowski authored Sep 11, 2019
  
  4a39c5d8
- hdl: updated submodules · 1a289f2c
  Tomasz Wlostowski authored Sep 11, 2019
  
  1a289f2c
01 Sep, 2019 2 commits
- wip · 40936f9e
  Tomasz Wlostowski authored Sep 01, 2019
  
  40936f9e
- updated submodules · 620cd691
  Tomasz Wlostowski authored Sep 01, 2019
  
  620cd691
02 Apr, 2019 6 commits
- syn: updated synthesis scripts for wrpc-v2.4 · 3c79319c
  Tomasz Wlostowski authored Apr 02, 2019
  
  3c79319c
- top/svec: IODELAY fix, migrated to wrpc v4-2 · 4a4b1152
  Tomasz Wlostowski authored Apr 02, 2019
  
  4a4b1152
- hdl: IODELAY control port in fine_delay_core · 99253dd6
  Tomasz Wlostowski authored Apr 02, 2019
  
  99253dd6
- hdl: added IODELAY control to the WB register block · f6a2b0a9
  Tomasz Wlostowski authored Apr 02, 2019
  
  f6a2b0a9
- hdl: don't sample start with the falling clock edge · 198cf18b
  Tomasz Wlostowski authored Apr 02, 2019
  
  198cf18b
- hdl: updated ip-cores to match wrpc v4.2 · 63e28db7
  Tomasz Wlostowski authored Apr 02, 2019
  
  63e28db7
20 Mar, 2017 2 commits
- syn/spec: update Manifest.py for hdlmake v2.1 · 72f0b813
  Grzegorz Daniluk authored Mar 20, 2017
  
  72f0b813
- spec: update WRPC to v4.0 · 23700973
  Grzegorz Daniluk authored Mar 20, 2017
  
  23700973
02 Feb, 2015 1 commit
- circuit_board: synced with EDMS V6.1 release · 585895e2
  Tomasz Wlostowski authored Feb 02, 2015
  
  585895e2
09 Dec, 2014 3 commits
- top: updated to latest version of GN4124 core · a1af67a9
  Tomasz Wlostowski authored Dec 09, 2014
  
  a1af67a9
- hdl/ip_cores: updated submodules to latest versions (including WR Heisenbug fix) · e67d2ca1
  Tomasz Wlostowski authored Dec 09, 2014
  
  e67d2ca1
- doc/design-notes: minor fixes · c23f0572
  Tomasz Wlostowski authored Dec 09, 2014
  
  c23f0572
23 Sep, 2014 1 commit
- mechanical: heatsink design files · 7488357d
  Tomasz Wlostowski authored Sep 23, 2014
  
  7488357d
27 May, 2014 1 commit
- circuit_board: synced with EDMS V6.0 release · be77deff
  Tomasz Wlostowski authored May 27, 2014
  
  be77deff
26 Mar, 2014 1 commit
- hdl/top/spec: reduce fine '295 outputs drive strength on the SPEC too · 7dd0a8c3
  Tomasz Wlostowski authored Mar 26, 2014
  
  7dd0a8c3
25 Mar, 2014 3 commits
- hdl/syn/svec: migrate to ISE 14.5 · a3f676c4
  Tomasz Wlostowski authored Mar 25, 2014
  
  a3f676c4
- hdl/top/svec: reduce delay line control outputs drive stregths (fixes signal integrity issues) · cf1ce608
  Tomasz Wlostowski authored Mar 25, 2014
  
  cf1ce608
- hdl/rtl/fd_delay_line_arbiter.vhd: delay output by 1 cycle to improve timing closure · 6bf2c42b
  Tomasz Wlostowski authored Mar 25, 2014
  
  6bf2c42b
24 Mar, 2014 2 commits
- hdl/testbench/svec_wr_top: verify the new arbiter · 883c423a
  Tomasz Wlostowski authored Mar 24, 2014
  
  883c423a
- hdl/rtl/fd_delay_line_arbiter.vhd: rewritten for faster arbitration to never miss 600 ns deadline · 7dea47db
  Tomasz Wlostowski authored Mar 24, 2014
```
The commit also adds possibility of wiring the channel driver 0 and ACAM data valid strobes/state indication
to the front panel LEMO connectors on the SVEC carrier, for the purpose of debugging ACAM/output stage processing latency.
```
  7dea47db
19 Mar, 2014 5 commits
- hdl/[top,syn]: updated manifests and ISE projects to the latest submodule versions · c2353fcd
  Tomasz Wlostowski authored Mar 19, 2014
  
  c2353fcd
- hdl/[top,syn]: moved s[v|p]ec/wr to just svec/spec, there is no non-WhiteRabbit top level anymore · 68cd7428
  Tomasz Wlostowski authored Mar 19, 2014
  
  68cd7428
- hdl/top: default synthesis includes WR core firmware and exludes Etherbone · 6dd38ee3
  Tomasz Wlostowski authored Mar 19, 2014
  
  6dd38ee3
- hdl/top: removed redundant copies of spec_serial_dac(_arb), now they are in wr-cores · fad0bf61
  Tomasz Wlostowski authored Mar 19, 2014
  
  fad0bf61
- hdl/ip_cores: updated wr-cores to include the SOF fix · d5b92e69
  Tomasz Wlostowski authored Mar 19, 2014
  
  d5b92e69
18 Mar, 2014 5 commits
- hdl/ip_cores: updated wr-cores to contain ep_packet_filter timing fix · de2431fb
  Tomasz Wlostowski authored Mar 18, 2014
  
  de2431fb
- hdl/syn: bundled release 2.1 of the WR core for WRC firmware integration · ce0d0232
  Tomasz Wlostowski authored Mar 18, 2014
  
  ce0d0232
- hdl/top/svec/wr/svec_top.ucf: relax inter-clock domain timing · 41151ff3
  Tomasz Wlostowski authored Mar 18, 2014
  
  41151ff3
- hdl/top/svec/wr/bicolor_led_ctrl.vhd: eliminate latch · 39480871
  Tomasz Wlostowski authored Mar 18, 2014
  
  39480871
- hdl/ip_cores: add gn4124-core as a submodule · 556b339f
  Tomasz Wlostowski authored Mar 18, 2014
  
  556b339f
17 Mar, 2014 2 commits
- hdl/syn/svec: updated ISE project to use local ip_cores/ repo checkouts · 70c0e033
  Tomasz Wlostowski authored Mar 17, 2014
  
  70c0e033
- hdl/rtl/fd_spi_dac_arbiter.vhd: mask WR Core DAC write signal with TCR.WR_ENABLE bit · e93ae297
  Tomasz Wlostowski authored Mar 17, 2014
```
This prevents the WR Core from messing up with the FD DAC settings when an incorrect
WRC firmware is loaded.
```
  e93ae297