FMC DEL 1ns 4cha:7141e6e31ee81ac05eb78243f8e6e53c82373637 commitshttps://ohwr.org/project/fmc-delay-1ns-8cha/commits/7141e6e31ee81ac05eb78243f8e6e53c823736372013-02-18T15:31:01Zhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/7141e6e31ee81ac05eb78243f8e6e53c82373637acam: work in G mode instead of R mode (appears to fix 1.5 ns bug)2013-02-18T15:31:01ZTomasz Wlostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/ef47a7bd906b3e8bc517475d6d5fcb2f98cb93fchdl/top/svec: migrate to latest version of VME64x core2012-12-14T10:36:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/52aa9a88b1634965ad785f6de013817578800779hdl/top/svec: remove useless CLOCK_DEDICATED_ROUTE constraint2012-12-14T10:36:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/37e76fae34529fa6377f7d110baad926bc200bechdl/top/svec: added power-up reset2012-12-14T10:36:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/74311c60805de4adceb2d7c45ddde64dde12ba5bhdl/rtl/fine_delay_core.vhd: direct (non-Wishbone) timestamp/trigger I/O2012-12-14T10:36:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/82d882ec33322c5418771b067eca184f244f3a7bhdl/rtl/fd_csync_generator.vhd: don't fire IRQ on DMTD lock state change2012-12-14T10:36:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/1c399c9129b3f2c433c871bc7ce34584495c6356hdl/rtl/fd_main_wishbone_slave.vhd: I2C outputs should be set to ones upon reset2012-12-14T10:36:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/7f430c0e50946a29ea4264ce2d51080e3d52cae2hdl/rtl/fd_main_wishbone_slave: fix TS buffer interrupt polarity2012-12-14T10:36:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/60df718d79122a4292b91c7a7496b236412b1b6chdl/syn: updated ISE projects for SVEC and SPEC2012-12-14T10:36:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/6deb1220daa9bb45f2273d3afddbcb93ac02d423hdl/top/svec: top level: new VME64x core, interrupts and Etherbone slave name...2012-12-14T10:36:07ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/4160f44e957ba883b41d5bbb5428e31733a70fefhdl/testbench: minor fixes2012-12-14T10:36:07ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/36e07dc3fc522188cc352b37d22eebd11fc67a4ehdl/rtl/fine_delay_pkg.vhd: remove spaces from the core name in the SDB descr...2012-12-14T10:36:07ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/a686b99847e0bf649cebed384ac1dab7aaf4666fhdl/ip_cores: removed vme64x-core files from the repo2012-12-14T10:36:07ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/ec77872b2c30f8f93a7ebec1f7a166e48b1d58a5hdl/top/spec: updated Etherbone entity name2012-12-14T10:36:07ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/3639a71dc899e663c4b3197c4059e920f2c2ce27hdl/syn/spec: added WRC binary firmware to build2012-12-14T10:36:07ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/fe7dccd00878c00f4c4be323333d615352135c9fhdl/syn/spec: top level with VIC interrupt controller, removed spaces from SD...2012-12-14T10:36:07ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/fc2032e6c7f4162afb67f040ea83189f36aabaf2fdelay_lib.h: fix timestamp structure layout to keep python compatibility2012-09-25T07:59:38ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/3467c1fbcbe79220fc0b919745b1bb9997409ff8software: demo program using Etherbone2012-09-21T16:03:59ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/87a22048937ae51efc33bf4e0f3338d6f32b9d45hdl/top/spec: added power-on-reset generator that works both in PCIe and stan...2012-09-21T08:49:40ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/2ad30ecebe24ab87fd663b124a2b8e8b41877090hdl/top/svec: SDB block at 0 offset2012-09-21T08:49:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/cde561fc48bce0a5307f1aa7998bad265e0b90d2hdl/top: removed minibone2012-09-21T08:47:35ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/7e43140eb43fcd5253c4092b76ded20504c494d7hdl/top: new top level with Etherbone and SDB support2012-09-21T08:47:21ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/3e8e0ae44908cf3dcc21a92b6a58c73b2b89a0cetestbench: uploaded system-level testbenench for SVEC2012-08-13T15:28:55ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/a21d0b54592760a77e12a02d8dd29b6466533c87[top/syn]/svec/wr: SVEC top level with new VME Core, working WR Core and Ethe...2012-08-13T15:28:07ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/57dd271511fe314c78f3f41d13e7a718ce72fca8rtl/fine_delay_core.vhd: increase SPI clock speed for system-level simulation2012-08-13T15:23:26ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/78b34df6592041daed8262b8255aab16491942d3rtl/fine_delay_pkg.vhd: added SDB descriptor2012-08-13T15:23:04ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/e4ad4327ac95763c9da8cf6024686f83da7b7d37include: lots of fixes in simulation models (for VME top level)2012-08-13T15:22:14ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/41a9236d5543d8e15676f148fc097457dd112b99Fix SystemVerilog extenstions2012-08-13T15:20:08ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/f4f3543958ca563be6f7d2e655898eb01b394b2adoc: initial commit2012-07-06T14:42:43ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/c24c8fea8a9d65357cd78a41ce331856f4253880hdl: top level and simple testbench for SVEC (with 2 fine delays)2012-06-22T13:07:02ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/c993cca5a0f7010db33bcffb5570cff213e773ffhdl/rtl/fine_delay_pkg: comment out SDB descriptor2012-06-22T13:07:02ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/d27a3e3b8d37ddc71babf0ac7547c135d61f45acMerge branch 'master' of ohwr.org:fmc-projects/fmc-delay-1ns-8cha2012-06-08T09:02:33ZTomasz Wlostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/b4495e8a24edd52c9c63504feed8149aa3bc2bbcsoftware/python: library based on SPEC driver2012-06-08T09:02:21ZTomasz Wlostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/e9ab8ca89e818eed7ef18a3113f7a8cc0ce38b64software/lib: fixed Makefiles/includes to support SPEC's firmware loader2012-06-08T09:02:00ZTomasz Wlostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/1a9fad9f7e95b804f5a947812939692994b79e6csyn,top: WR-compatible top level2012-06-06T12:39:14ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/36107a74cc61fa54d7dfedaba49fe59d7932a46dsyn,top: removed non-WR top levels2012-06-06T12:37:48ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/894ee42d35ee5d1e4ff3706c3df15c71519a33c0hdl/rtl/fine_delay_pkg.vhd: fine-tuned DDMTD calibrator parameters, updated c...2012-06-06T12:35:59ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/f9b197e3a912aaa7ba3feb6297399316bb0a1bc1hdl/rtl/fine_delay_core: wired new DDMTD calibrator2012-06-06T12:35:31ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/6dc2efe3af4e68ffef858003cfb64ffec0cd32a6hdl/rtl/fd_dmtd_insertion_calibrator: rewritten and tested2012-06-06T12:32:21ZTomasz Włostowskitomasz.wlostowski@cern.chhttps://ohwr.org/project/fmc-delay-1ns-8cha/commit/6c14330f1557f83397fa7b1ca392c337fad21f43hdl/rtl/fd_delay_channel_driver: force output to 1 when DCR.FORCE_HI bit set2012-06-06T12:31:25ZTomasz Włostowskitomasz.wlostowski@cern.ch