Commit f5497277 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski

svec pinswapping [wip]

parent 79e647cb
......@@ -321,25 +321,25 @@ NET "uart_rxd_i" IOSTANDARD = "LVCMOS33";
NET "tempid_dq_b" IOSTANDARD = "LVCMOS33";
NET "fmc0_prsntm2c_n_i" LOC = N30;
NET "fmc0_scl_b" LOC = P28;
NET "fmc0_sda_b" LOC = P30;
NET "fmc1_prsntm2c_n_i" LOC = N30;
NET "fmc1_scl_b" LOC = P28;
NET "fmc1_sda_b" LOC = P30;
NET "fmc1_prsntm2c_n_i" LOC = AE29;
NET "fmc1_scl_b" LOC = W29;
NET "fmc1_sda_b" LOC = V30;
NET "fmc0_prsntm2c_n_i" LOC = AE29;
NET "fmc0_scl_b" LOC = W29;
NET "fmc0_sda_b" LOC = V30;
NET "fmc0_prsntm2c_n_i" IOSTANDARD = "LVCMOS33";
NET "fmc0_scl_b" IOSTANDARD = "LVCMOS33";
NET "fmc0_sda_b" IOSTANDARD = "LVCMOS33";
NET "fmc1_prsntm2c_n_i" IOSTANDARD = "LVCMOS33";
NET "fmc1_scl_b" IOSTANDARD = "LVCMOS33";
NET "fmc1_sda_b" IOSTANDARD = "LVCMOS33";
NET "fmc0_prsntm2c_n_i" IOSTANDARD = "LVCMOS33";
NET "fmc0_scl_b" IOSTANDARD = "LVCMOS33";
NET "fmc0_sda_b" IOSTANDARD = "LVCMOS33";
#Created by Constraints Editor (xc6slx150t-fgg900-3) - 2012/06/15
NET "clk_20m_vcxo_i" TNM_NET = clk_20m_vcxo_i;
......@@ -365,8 +365,7 @@ TIMESPEC TS_fd1_clk_ref_n_i = PERIOD "fd1_clk_ref_n_i" 8 ns HIGH 50%;
NET "gen_with_phy.U_GTP/ch1_gtp_clkout_int<1>" TNM_NET = gen_with_phy.U_GTP/ch1_gtp_clkout_int<1>;
TIMESPEC TS_gen_with_phy_U_GTP_ch1_gtp_clkout_int_1_ = PERIOD "gen_with_phy.U_GTP/ch1_gtp_clkout_int<1>" 8 ns HIGH 50%;
#PIN "gen_with_phy.U_GTP/gen_with_channel1.U_Rbclk_buf_ch1.DIVCLK"
# CLOCK_DEDICATED_ROUTE = FALSE;
TIMESPEC ts_ignore_xclock1 = FROM "pllout_clk_sys" TO "clk_125m_pllref_p_i" 10 ns DATAPATHONLY;
TIMESPEC ts_ignore_xclock2 = FROM "clk_125m_pllref_p_i" TO "pllout_clk_sys" 10 ns DATAPATHONLY;
......@@ -380,293 +379,293 @@ TIMESPEC TS_x6 = FROM "gen_with_phy_U_GTP_ch1_rx_divclk" TO "clk_125m_pllref_p_i
# This section has bee generated automatically by ucfgen.py. Do not hand-modify if not really necessary.
# ucfgen pin assignments for mezzanine fmc-delay-v4 slot 0
NET "fd0_clk_ref_p_i" LOC = "E16";
NET "fd0_clk_ref_p_i" IOSTANDARD = "LVDS_25";
NET "fd0_clk_ref_n_i" LOC = "D16";
NET "fd0_clk_ref_n_i" IOSTANDARD = "LVDS_25";
NET "fd0_tdc_start_p_i" LOC = "H15";
NET "fd0_tdc_start_p_i" IOSTANDARD = "LVDS_25";
NET "fd0_tdc_start_n_i" LOC = "G15";
NET "fd0_tdc_start_n_i" IOSTANDARD = "LVDS_25";
NET "fd0_delay_len_o[3]" LOC = "G10";
NET "fd0_delay_len_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_len_o[2]" LOC = "F10";
NET "fd0_delay_len_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_len_o[1]" LOC = "E9";
NET "fd0_delay_len_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_len_o[0]" LOC = "F9";
NET "fd0_delay_len_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_pulse_o[3]" LOC = "F12";
NET "fd0_delay_pulse_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_pulse_o[1]" LOC = "E11";
NET "fd0_delay_pulse_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_pulse_o[2]" LOC = "G12";
NET "fd0_delay_pulse_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_pulse_o[0]" LOC = "F11";
NET "fd0_delay_pulse_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[3]" LOC = "J12";
NET "fd0_delay_val_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[1]" LOC = "H11";
NET "fd0_delay_val_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[7]" LOC = "L11";
NET "fd0_delay_val_o[7]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[5]" LOC = "J13";
NET "fd0_delay_val_o[5]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[9]" LOC = "L12";
NET "fd0_delay_val_o[9]" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_mosi_o" LOC = "M13";
NET "fd0_spi_mosi_o" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_sclk_o" LOC = "L14";
NET "fd0_spi_sclk_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_oe_n_o" LOC = "M15";
NET "fd0_tdc_oe_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_start_dis_o" LOC = "F13";
NET "fd0_tdc_start_dis_o" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_cs_gpio_n_o" LOC = "F15";
NET "fd0_spi_cs_gpio_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_cal_pulse_o" LOC = "G14";
NET "fd0_tdc_cal_pulse_o" IOSTANDARD = "LVCMOS25";
NET "fd0_dmtd_clk_o" LOC = "J14";
NET "fd0_dmtd_clk_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_wr_n_o" LOC = "B15";
NET "fd0_tdc_wr_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_alutrigger_o" LOC = "F19";
NET "fd0_tdc_alutrigger_o" IOSTANDARD = "LVCMOS25";
NET "fd0_led_trig_o" LOC = "H16";
NET "fd0_led_trig_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[26]" LOC = "F17";
NET "fd0_tdc_d_b[26]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[24]" LOC = "G18";
NET "fd0_tdc_d_b[24]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[20]" LOC = "F21";
NET "fd0_tdc_d_b[20]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[22]" LOC = "G20";
NET "fd0_tdc_d_b[22]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[18]" LOC = "L21";
NET "fd0_tdc_d_b[18]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[16]" LOC = "M20";
NET "fd0_tdc_d_b[16]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[10]" LOC = "F23";
NET "fd0_tdc_d_b[10]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[14]" LOC = "G22";
NET "fd0_tdc_d_b[14]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[8]" LOC = "B25";
NET "fd0_tdc_d_b[8]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[12]" LOC = "M19";
NET "fd0_tdc_d_b[12]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[3]" LOC = "D24";
NET "fd0_tdc_d_b[3]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[5]" LOC = "E25";
NET "fd0_tdc_d_b[5]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[7]" LOC = "J22";
NET "fd0_tdc_d_b[7]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[2]" LOC = "H21";
NET "fd0_tdc_d_b[2]" IOSTANDARD = "LVCMOS25";
NET "fd0_trig_a_i" LOC = "C16";
NET "fd0_trig_a_i" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[2]" LOC = "H12";
NET "fd0_delay_val_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[0]" LOC = "G11";
NET "fd0_delay_val_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[6]" LOC = "K11";
NET "fd0_delay_val_o[6]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[4]" LOC = "H13";
NET "fd0_delay_val_o[4]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[8]" LOC = "K12";
NET "fd0_delay_val_o[8]" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_miso_i" LOC = "L13";
NET "fd0_spi_miso_i" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_cs_pll_n_o" LOC = "K14";
NET "fd0_spi_cs_pll_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_cs_dac_n_o" LOC = "K15";
NET "fd0_spi_cs_dac_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_stop_dis_o" LOC = "E13";
NET "fd0_tdc_stop_dis_o" IOSTANDARD = "LVCMOS25";
NET "fd0_ext_rst_n_o" LOC = "E15";
NET "fd0_ext_rst_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_pll_status_i" LOC = "F14";
NET "fd0_pll_status_i" IOSTANDARD = "LVCMOS25";
NET "fd0_dmtd_fb_out_i" LOC = "H14";
NET "fd0_dmtd_fb_out_i" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_rd_n_o" LOC = "A15";
NET "fd0_tdc_rd_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_emptyf_i" LOC = "E19";
NET "fd0_tdc_emptyf_i" IOSTANDARD = "LVCMOS25";
NET "fd0_onewire_b" LOC = "G16";
NET "fd0_onewire_b" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[27]" LOC = "E17";
NET "fd0_tdc_d_b[27]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[25]" LOC = "F18";
NET "fd0_tdc_d_b[25]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[21]" LOC = "E21";
NET "fd0_tdc_d_b[21]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[23]" LOC = "F20";
NET "fd0_tdc_d_b[23]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[19]" LOC = "K21";
NET "fd0_tdc_d_b[19]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[17]" LOC = "L20";
NET "fd0_tdc_d_b[17]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[11]" LOC = "E23";
NET "fd0_tdc_d_b[11]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[15]" LOC = "F22";
NET "fd0_tdc_d_b[15]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[9]" LOC = "A25";
NET "fd0_tdc_d_b[9]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[13]" LOC = "L19";
NET "fd0_tdc_d_b[13]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[1]" LOC = "C24";
NET "fd0_tdc_d_b[1]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[4]" LOC = "D25";
NET "fd0_tdc_d_b[4]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[6]" LOC = "H22";
NET "fd0_tdc_d_b[6]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[0]" LOC = "G21";
NET "fd0_tdc_d_b[0]" IOSTANDARD = "LVCMOS25";
NET "fd0_dmtd_fb_in_i" LOC = "A16";
NET "fd0_dmtd_fb_in_i" IOSTANDARD = "LVCMOS25";
# ucfgen pin assignments for mezzanine fmc-delay-v4 slot 1
NET "fd1_clk_ref_p_i" LOC = "AH16";
NET "fd1_clk_ref_p_i" LOC = "E16";
NET "fd1_clk_ref_p_i" IOSTANDARD = "LVDS_25";
NET "fd1_clk_ref_n_i" LOC = "AK16";
NET "fd1_clk_ref_n_i" LOC = "D16";
NET "fd1_clk_ref_n_i" IOSTANDARD = "LVDS_25";
NET "fd1_tdc_start_p_i" LOC = "AF16";
NET "fd1_tdc_start_p_i" LOC = "H15";
NET "fd1_tdc_start_p_i" IOSTANDARD = "LVDS_25";
NET "fd1_tdc_start_n_i" LOC = "AG16";
NET "fd1_tdc_start_n_i" LOC = "G15";
NET "fd1_tdc_start_n_i" IOSTANDARD = "LVDS_25";
NET "fd1_delay_len_o[3]" LOC = "AB21";
NET "fd1_delay_len_o[3]" LOC = "G10";
NET "fd1_delay_len_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_len_o[2]" LOC = "AC21";
NET "fd1_delay_len_o[2]" LOC = "F10";
NET "fd1_delay_len_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_len_o[1]" LOC = "AD24";
NET "fd1_delay_len_o[1]" LOC = "E9";
NET "fd1_delay_len_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_len_o[0]" LOC = "AC24";
NET "fd1_delay_len_o[0]" LOC = "F9";
NET "fd1_delay_len_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_pulse_o[3]" LOC = "AE22";
NET "fd1_delay_pulse_o[3]" LOC = "F12";
NET "fd1_delay_pulse_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_pulse_o[1]" LOC = "AD17";
NET "fd1_delay_pulse_o[1]" LOC = "E11";
NET "fd1_delay_pulse_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_pulse_o[2]" LOC = "AD22";
NET "fd1_delay_pulse_o[2]" LOC = "G12";
NET "fd1_delay_pulse_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_pulse_o[0]" LOC = "AB17";
NET "fd1_delay_pulse_o[0]" LOC = "F11";
NET "fd1_delay_pulse_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[3]" LOC = "AA19";
NET "fd1_delay_val_o[3]" LOC = "J12";
NET "fd1_delay_val_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[1]" LOC = "W19";
NET "fd1_delay_val_o[1]" LOC = "H11";
NET "fd1_delay_val_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[7]" LOC = "Y21";
NET "fd1_delay_val_o[7]" LOC = "L11";
NET "fd1_delay_val_o[7]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[5]" LOC = "W20";
NET "fd1_delay_val_o[5]" LOC = "J13";
NET "fd1_delay_val_o[5]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[9]" LOC = "AA22";
NET "fd1_delay_val_o[9]" LOC = "L12";
NET "fd1_delay_val_o[9]" IOSTANDARD = "LVCMOS25";
NET "fd1_spi_mosi_o" LOC = "AB20";
NET "fd1_spi_mosi_o" LOC = "M13";
NET "fd1_spi_mosi_o" IOSTANDARD = "LVCMOS25";
NET "fd1_spi_sclk_o" LOC = "AC19";
NET "fd1_spi_sclk_o" LOC = "L14";
NET "fd1_spi_sclk_o" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_oe_n_o" LOC = "AF25";
NET "fd1_tdc_oe_n_o" LOC = "M15";
NET "fd1_tdc_oe_n_o" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_start_dis_o" LOC = "AE24";
NET "fd1_tdc_start_dis_o" LOC = "F13";
NET "fd1_tdc_start_dis_o" IOSTANDARD = "LVCMOS25";
NET "fd1_spi_cs_gpio_n_o" LOC = "AE19";
NET "fd1_spi_cs_gpio_n_o" LOC = "F15";
NET "fd1_spi_cs_gpio_n_o" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_cal_pulse_o" LOC = "AE23";
NET "fd1_tdc_cal_pulse_o" LOC = "G14";
NET "fd1_tdc_cal_pulse_o" IOSTANDARD = "LVCMOS25";
NET "fd1_dmtd_clk_o" LOC = "AE21";
NET "fd1_dmtd_clk_o" LOC = "J14";
NET "fd1_dmtd_clk_o" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_wr_n_o" LOC = "AC16";
NET "fd1_tdc_wr_n_o" LOC = "B15";
NET "fd1_tdc_wr_n_o" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_alutrigger_o" LOC = "AB14";
NET "fd1_tdc_alutrigger_o" LOC = "F19";
NET "fd1_tdc_alutrigger_o" IOSTANDARD = "LVCMOS25";
NET "fd1_led_trig_o" LOC = "Y17";
NET "fd1_led_trig_o" LOC = "H16";
NET "fd1_led_trig_o" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[26]" LOC = "Y15";
NET "fd1_tdc_d_b[26]" LOC = "F17";
NET "fd1_tdc_d_b[26]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[24]" LOC = "AC15";
NET "fd1_tdc_d_b[24]" LOC = "G18";
NET "fd1_tdc_d_b[24]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[20]" LOC = "AE15";
NET "fd1_tdc_d_b[20]" LOC = "F21";
NET "fd1_tdc_d_b[20]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[22]" LOC = "Y16";
NET "fd1_tdc_d_b[22]" LOC = "G20";
NET "fd1_tdc_d_b[22]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[18]" LOC = "Y14";
NET "fd1_tdc_d_b[18]" LOC = "L21";
NET "fd1_tdc_d_b[18]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[16]" LOC = "W14";
NET "fd1_tdc_d_b[16]" LOC = "M20";
NET "fd1_tdc_d_b[16]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[10]" LOC = "AB12";
NET "fd1_tdc_d_b[10]" LOC = "F23";
NET "fd1_tdc_d_b[10]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[14]" LOC = "AD12";
NET "fd1_tdc_d_b[14]" LOC = "G22";
NET "fd1_tdc_d_b[14]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[8]" LOC = "AD10";
NET "fd1_tdc_d_b[8]" LOC = "B25";
NET "fd1_tdc_d_b[8]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[12]" LOC = "AE11";
NET "fd1_tdc_d_b[12]" LOC = "M19";
NET "fd1_tdc_d_b[12]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[3]" LOC = "AJ15";
NET "fd1_tdc_d_b[3]" LOC = "D24";
NET "fd1_tdc_d_b[3]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[5]" LOC = "AE13";
NET "fd1_tdc_d_b[5]" LOC = "E25";
NET "fd1_tdc_d_b[5]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[7]" LOC = "AC11";
NET "fd1_tdc_d_b[7]" LOC = "J22";
NET "fd1_tdc_d_b[7]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[2]" LOC = "AG8";
NET "fd1_tdc_d_b[2]" LOC = "H21";
NET "fd1_tdc_d_b[2]" IOSTANDARD = "LVCMOS25";
NET "fd1_trig_a_i" LOC = "AJ17";
NET "fd1_trig_a_i" LOC = "C16";
NET "fd1_trig_a_i" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[2]" LOC = "AB19";
NET "fd1_delay_val_o[2]" LOC = "H12";
NET "fd1_delay_val_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[0]" LOC = "Y19";
NET "fd1_delay_val_o[0]" LOC = "G11";
NET "fd1_delay_val_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[6]" LOC = "AA21";
NET "fd1_delay_val_o[6]" LOC = "K11";
NET "fd1_delay_val_o[6]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[4]" LOC = "Y20";
NET "fd1_delay_val_o[4]" LOC = "H13";
NET "fd1_delay_val_o[4]" IOSTANDARD = "LVCMOS25";
NET "fd1_delay_val_o[8]" LOC = "AC22";
NET "fd1_delay_val_o[8]" LOC = "K12";
NET "fd1_delay_val_o[8]" IOSTANDARD = "LVCMOS25";
NET "fd1_spi_miso_i" LOC = "AC20";
NET "fd1_spi_miso_i" LOC = "L13";
NET "fd1_spi_miso_i" IOSTANDARD = "LVCMOS25";
NET "fd1_spi_cs_pll_n_o" LOC = "AD19";
NET "fd1_spi_cs_pll_n_o" LOC = "K14";
NET "fd1_spi_cs_pll_n_o" IOSTANDARD = "LVCMOS25";
NET "fd1_spi_cs_dac_n_o" LOC = "AG25";
NET "fd1_spi_cs_dac_n_o" LOC = "K15";
NET "fd1_spi_cs_dac_n_o" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_stop_dis_o" LOC = "AF24";
NET "fd1_tdc_stop_dis_o" LOC = "E13";
NET "fd1_tdc_stop_dis_o" IOSTANDARD = "LVCMOS25";
NET "fd1_ext_rst_n_o" LOC = "AF19";
NET "fd1_ext_rst_n_o" LOC = "E15";
NET "fd1_ext_rst_n_o" IOSTANDARD = "LVCMOS25";
NET "fd1_pll_status_i" LOC = "AF23";
NET "fd1_pll_status_i" LOC = "F14";
NET "fd1_pll_status_i" IOSTANDARD = "LVCMOS25";
NET "fd1_dmtd_fb_out_i" LOC = "AF21";
NET "fd1_dmtd_fb_out_i" LOC = "H14";
NET "fd1_dmtd_fb_out_i" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_rd_n_o" LOC = "AD16";
NET "fd1_tdc_rd_n_o" LOC = "A15";
NET "fd1_tdc_rd_n_o" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_emptyf_i" LOC = "AC14";
NET "fd1_tdc_emptyf_i" LOC = "E19";
NET "fd1_tdc_emptyf_i" IOSTANDARD = "LVCMOS25";
NET "fd1_onewire_b" LOC = "AA17";
NET "fd1_onewire_b" LOC = "G16";
NET "fd1_onewire_b" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[27]" LOC = "AA15";
NET "fd1_tdc_d_b[27]" LOC = "E17";
NET "fd1_tdc_d_b[27]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[25]" LOC = "AD15";
NET "fd1_tdc_d_b[25]" LOC = "F18";
NET "fd1_tdc_d_b[25]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[21]" LOC = "AF15";
NET "fd1_tdc_d_b[21]" LOC = "E21";
NET "fd1_tdc_d_b[21]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[23]" LOC = "AB16";
NET "fd1_tdc_d_b[23]" LOC = "F20";
NET "fd1_tdc_d_b[23]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[19]" LOC = "AA14";
NET "fd1_tdc_d_b[19]" LOC = "K21";
NET "fd1_tdc_d_b[19]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[17]" LOC = "Y13";
NET "fd1_tdc_d_b[17]" LOC = "L20";
NET "fd1_tdc_d_b[17]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[11]" LOC = "AC12";
NET "fd1_tdc_d_b[11]" LOC = "E23";
NET "fd1_tdc_d_b[11]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[15]" LOC = "AE12";
NET "fd1_tdc_d_b[15]" LOC = "F22";
NET "fd1_tdc_d_b[15]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[9]" LOC = "AE10";
NET "fd1_tdc_d_b[9]" LOC = "A25";
NET "fd1_tdc_d_b[9]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[13]" LOC = "AF11";
NET "fd1_tdc_d_b[13]" LOC = "L19";
NET "fd1_tdc_d_b[13]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[1]" LOC = "AK15";
NET "fd1_tdc_d_b[1]" LOC = "C24";
NET "fd1_tdc_d_b[1]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[4]" LOC = "AF13";
NET "fd1_tdc_d_b[4]" LOC = "D25";
NET "fd1_tdc_d_b[4]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[6]" LOC = "AD11";
NET "fd1_tdc_d_b[6]" LOC = "H22";
NET "fd1_tdc_d_b[6]" IOSTANDARD = "LVCMOS25";
NET "fd1_tdc_d_b[0]" LOC = "AH8";
NET "fd1_tdc_d_b[0]" LOC = "G21";
NET "fd1_tdc_d_b[0]" IOSTANDARD = "LVCMOS25";
NET "fd1_dmtd_fb_in_i" LOC = "AK17";
NET "fd1_dmtd_fb_in_i" LOC = "A16";
NET "fd1_dmtd_fb_in_i" IOSTANDARD = "LVCMOS25";
# ucfgen pin assignments for mezzanine fmc-delay-v4 slot 1
NET "fd0_clk_ref_p_i" LOC = "AH16";
NET "fd0_clk_ref_p_i" IOSTANDARD = "LVDS_25";
NET "fd0_clk_ref_n_i" LOC = "AK16";
NET "fd0_clk_ref_n_i" IOSTANDARD = "LVDS_25";
NET "fd0_tdc_start_p_i" LOC = "AF16";
NET "fd0_tdc_start_p_i" IOSTANDARD = "LVDS_25";
NET "fd0_tdc_start_n_i" LOC = "AG16";
NET "fd0_tdc_start_n_i" IOSTANDARD = "LVDS_25";
NET "fd0_delay_len_o[3]" LOC = "AB21";
NET "fd0_delay_len_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_len_o[2]" LOC = "AC21";
NET "fd0_delay_len_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_len_o[1]" LOC = "AD24";
NET "fd0_delay_len_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_len_o[0]" LOC = "AC24";
NET "fd0_delay_len_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_pulse_o[3]" LOC = "AE22";
NET "fd0_delay_pulse_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_pulse_o[1]" LOC = "AD17";
NET "fd0_delay_pulse_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_pulse_o[2]" LOC = "AD22";
NET "fd0_delay_pulse_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_pulse_o[0]" LOC = "AB17";
NET "fd0_delay_pulse_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[3]" LOC = "AA19";
NET "fd0_delay_val_o[3]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[1]" LOC = "W19";
NET "fd0_delay_val_o[1]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[7]" LOC = "Y21";
NET "fd0_delay_val_o[7]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[5]" LOC = "W20";
NET "fd0_delay_val_o[5]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[9]" LOC = "AA22";
NET "fd0_delay_val_o[9]" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_mosi_o" LOC = "AB20";
NET "fd0_spi_mosi_o" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_sclk_o" LOC = "AC19";
NET "fd0_spi_sclk_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_oe_n_o" LOC = "AF25";
NET "fd0_tdc_oe_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_start_dis_o" LOC = "AE24";
NET "fd0_tdc_start_dis_o" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_cs_gpio_n_o" LOC = "AE19";
NET "fd0_spi_cs_gpio_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_cal_pulse_o" LOC = "AE23";
NET "fd0_tdc_cal_pulse_o" IOSTANDARD = "LVCMOS25";
NET "fd0_dmtd_clk_o" LOC = "AE21";
NET "fd0_dmtd_clk_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_wr_n_o" LOC = "AC16";
NET "fd0_tdc_wr_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_alutrigger_o" LOC = "AB14";
NET "fd0_tdc_alutrigger_o" IOSTANDARD = "LVCMOS25";
NET "fd0_led_trig_o" LOC = "Y17";
NET "fd0_led_trig_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[26]" LOC = "Y15";
NET "fd0_tdc_d_b[26]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[24]" LOC = "AC15";
NET "fd0_tdc_d_b[24]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[20]" LOC = "AE15";
NET "fd0_tdc_d_b[20]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[22]" LOC = "Y16";
NET "fd0_tdc_d_b[22]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[18]" LOC = "Y14";
NET "fd0_tdc_d_b[18]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[16]" LOC = "W14";
NET "fd0_tdc_d_b[16]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[10]" LOC = "AB12";
NET "fd0_tdc_d_b[10]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[14]" LOC = "AD12";
NET "fd0_tdc_d_b[14]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[8]" LOC = "AD10";
NET "fd0_tdc_d_b[8]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[12]" LOC = "AE11";
NET "fd0_tdc_d_b[12]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[3]" LOC = "AJ15";
NET "fd0_tdc_d_b[3]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[5]" LOC = "AE13";
NET "fd0_tdc_d_b[5]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[7]" LOC = "AC11";
NET "fd0_tdc_d_b[7]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[2]" LOC = "AG8";
NET "fd0_tdc_d_b[2]" IOSTANDARD = "LVCMOS25";
NET "fd0_trig_a_i" LOC = "AJ17";
NET "fd0_trig_a_i" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[2]" LOC = "AB19";
NET "fd0_delay_val_o[2]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[0]" LOC = "Y19";
NET "fd0_delay_val_o[0]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[6]" LOC = "AA21";
NET "fd0_delay_val_o[6]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[4]" LOC = "Y20";
NET "fd0_delay_val_o[4]" IOSTANDARD = "LVCMOS25";
NET "fd0_delay_val_o[8]" LOC = "AC22";
NET "fd0_delay_val_o[8]" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_miso_i" LOC = "AC20";
NET "fd0_spi_miso_i" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_cs_pll_n_o" LOC = "AD19";
NET "fd0_spi_cs_pll_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_spi_cs_dac_n_o" LOC = "AG25";
NET "fd0_spi_cs_dac_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_stop_dis_o" LOC = "AF24";
NET "fd0_tdc_stop_dis_o" IOSTANDARD = "LVCMOS25";
NET "fd0_ext_rst_n_o" LOC = "AF19";
NET "fd0_ext_rst_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_pll_status_i" LOC = "AF23";
NET "fd0_pll_status_i" IOSTANDARD = "LVCMOS25";
NET "fd0_dmtd_fb_out_i" LOC = "AF21";
NET "fd0_dmtd_fb_out_i" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_rd_n_o" LOC = "AD16";
NET "fd0_tdc_rd_n_o" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_emptyf_i" LOC = "AC14";
NET "fd0_tdc_emptyf_i" IOSTANDARD = "LVCMOS25";
NET "fd0_onewire_b" LOC = "AA17";
NET "fd0_onewire_b" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[27]" LOC = "AA15";
NET "fd0_tdc_d_b[27]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[25]" LOC = "AD15";
NET "fd0_tdc_d_b[25]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[21]" LOC = "AF15";
NET "fd0_tdc_d_b[21]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[23]" LOC = "AB16";
NET "fd0_tdc_d_b[23]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[19]" LOC = "AA14";
NET "fd0_tdc_d_b[19]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[17]" LOC = "Y13";
NET "fd0_tdc_d_b[17]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[11]" LOC = "AC12";
NET "fd0_tdc_d_b[11]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[15]" LOC = "AE12";
NET "fd0_tdc_d_b[15]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[9]" LOC = "AE10";
NET "fd0_tdc_d_b[9]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[13]" LOC = "AF11";
NET "fd0_tdc_d_b[13]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[1]" LOC = "AK15";
NET "fd0_tdc_d_b[1]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[4]" LOC = "AF13";
NET "fd0_tdc_d_b[4]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[6]" LOC = "AD11";
NET "fd0_tdc_d_b[6]" IOSTANDARD = "LVCMOS25";
NET "fd0_tdc_d_b[0]" LOC = "AH8";
NET "fd0_tdc_d_b[0]" IOSTANDARD = "LVCMOS25";
NET "fd0_dmtd_fb_in_i" LOC = "AK17";
NET "fd0_dmtd_fb_in_i" IOSTANDARD = "LVCMOS25";
# <ucfgen_end>
......@@ -6,17 +6,16 @@
-- Author : Tomasz Wlostowski
-- Company : CERN
-- Created : 2011-08-24
-- Last update: 2012-11-22
-- Last update: 2013-01-16
-- Platform : FPGA-generic
-- Standard : VHDL'93
-------------------------------------------------------------------------------
-- Description: Top level for the SVEC 1.0 card with two Fine Delay FMCs.
-- Supports:
-- - A24/A32/D32 VME addressing
-- - SDB enumeration (SDB descriptor at 0x60000)
-- - SDB enumeration (SDB descriptor at 0x0)
-- - White Rabbit and Etherbone
-- Does not yet support:
-- - Interrupts
-- - Interrupts (via vme64x-core interrupter, to be verified)
-------------------------------------------------------------------------------
--
-- Copyright (c) 2011 CERN / BE-CO-HT
......@@ -334,7 +333,7 @@ architecture rtl of svec_top is
constant c_SLAVE_WRCORE : integer := 2;
constant c_SLAVE_VIC : integer := 3;
constant c_WRCORE_BRIDGE_SDB : t_sdb_bridge := f_xwb_bridge_manual_sdb(x"0003ffff", x"00070000");
constant c_WRCORE_BRIDGE_SDB : t_sdb_bridge := f_xwb_bridge_manual_sdb(x"0003ffff", x"00040000");
constant c_xwb_vic_sdb : t_sdb_device := (
abi_class => x"0000", -- undocumented device
......
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