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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
Commits
f03fd9ba
Commit
f03fd9ba
authored
Feb 18, 2013
by
Tomasz Wlostowski
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fdelay_lib: same code for spec & svec
parent
7141e6e3
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3 changed files
with
82 additions
and
83 deletions
+82
-83
fdelay_lib.h
software/include/fdelay_lib.h
+3
-0
Makefile
software/lib/Makefile
+11
-11
fdelay_bus.c
software/lib/fdelay_bus.c
+68
-72
No files found.
software/include/fdelay_lib.h
View file @
f03fd9ba
...
...
@@ -66,6 +66,7 @@ PUBLIC API
*/
fdelay_device_t
*
fdelay_create
();
/* Creates a local instance of Fine Delay Core at address base_addr on the SPEC at bus/devfn. Returns 0 on success, negative on error. */
int
spec_fdelay_create_bd
(
fdelay_device_t
*
dev
,
int
bus
,
int
dev_fn
,
uint32_t
base
);
...
...
@@ -117,6 +118,7 @@ int fdelay_configure_capture (fdelay_device_t *dev, int enable, int channel_mask
int
fdelay_read
(
fdelay_device_t
*
dev
,
fdelay_time_t
*
timestamps
,
int
how_many
);
int
fdelay_configure_output
(
fdelay_device_t
*
dev
,
int
channel
,
int
enable
,
int64_t
delay_ps
,
int64_t
width_ps
,
int64_t
delta_ps
,
int
rep_count
)
;
/* (delay mode only) Configures output(s) selected in channel_mask to work in delay mode. Delta_ps = spacing between
the rising edges of subsequent pulses. */
int
fdelay_configure_delay
(
fdelay_device_t
*
dev
,
int
channel_mask
,
int
enable
,
int64_t
delay_ps
,
int64_t
width_ps
,
int64_t
delta_ps
,
int
repeat_count
);
...
...
@@ -134,5 +136,6 @@ int fdelay_get_time(fdelay_device_t *dev, fdelay_time_t *t);
int
fdelay_set_time
(
fdelay_device_t
*
dev
,
const
fdelay_time_t
t
);
int
fdelay_dmtd_calibration
(
fdelay_device_t
*
dev
,
double
*
offsets
);
float
fdelay_get_board_temperature
(
fdelay_device_t
*
dev
);
#endif
software/lib/Makefile
View file @
f03fd9ba
SPEC_SW
?=
$(
shell
readlink
-f
~/wr-repos/spec-sw
)
ETHERBONE
?=
$(
shell
readlink
-f
~/wr-repos/etherbone-core/api
)
OBJS
=
fdelay_lib.o i2c_master.o onewire.o fdelay_bus.o
spec/tools/speclib.o spec/kernel/loader-ll.o fdelay_dmtd_calibration.o simple-eb.o
OBJS
=
fdelay_lib.o i2c_master.o onewire.o fdelay_bus.o
fdelay_dmtd_calibration.o sveclib/sveclib.o sveclib/libvmebus.o speclib/speclib.o
CFLAGS
=
-I
../include
-g
-Imini_bone
-Ispec
/tools
-I
etherbone
CFLAGS
=
-I
../include
-g
-Imini_bone
-Ispec
/tools
-I
sveclib
-I
.
ifeq
($(SPEC_SW),)
throw_error
:
@
echo
"SPEC software package location environment variable is not set. Can't compile :("
endif
#
ifeq ($(SPEC_SW),)
#
throw_error:
#
@echo "SPEC software package location environment variable is not set. Can't compile :("
#
endif
all
:
spec
lib
all
:
lib
spec
:
ln
-s
$(SPEC_SW)
spec
ln
-s
$(ETHERBONE)
etherbone
#
spec:
#
ln -s $(SPEC_SW) spec
#
ln -s $(ETHERBONE) etherbone
lib
:
$(OBJS)
gcc
-shared
-o
libfinedelay.so
$(OBJS)
-letherbone
gcc
-shared
-o
libfinedelay.so
$(OBJS)
ar rc libfinedelay.a
$(OBJS)
clean
:
...
...
software/lib/fdelay_bus.c
View file @
f03fd9ba
...
...
@@ -4,13 +4,24 @@
#include <getopt.h>
#include "fdelay_lib.h"
#include "simple-eb.h"
#include "spec/tools/speclib.h"
#include "sveclib/sveclib.h"
#include "speclib/speclib.h"
#include "fdelay_lib.h"
void
printk
()
{};
static
void
fd_svec_writel
(
void
*
priv
,
uint32_t
data
,
uint32_t
addr
)
{
svec_writel
(
priv
,
data
,
addr
);
}
static
uint32_t
fd_svec_readl
(
void
*
priv
,
uint32_t
addr
)
{
return
svec_readl
(
priv
,
addr
);
}
static
void
fd_spec_writel
(
void
*
priv
,
uint32_t
data
,
uint32_t
addr
)
{
spec_writel
(
priv
,
data
,
addr
);
...
...
@@ -22,94 +33,79 @@ static uint32_t fd_spec_readl(void *priv, uint32_t addr)
}
#if 0
static int spec_fdelay_create(fdelay_device_t *dev, int bus, int dev_fn)
{
uint32_t base;
#endif
dev->priv_io = spec_open(bus, dev_fn);
if(!dev->priv_io)
#define VENDOR_CERN 0xce42
#define DEVICE_FD_CORE 0xf19ede1a
#define DEVICE_VUART 0xe2d13d04
static
int
probe_svec
(
fdelay_device_t
*
dev
,
const
char
*
location
)
{
uint32_t
map_base
;
int
slot
;
void
*
card
;
uint32_t
core_base
;
if
(
!
strncmp
(
location
,
"svec:"
),
5
)
{
sscanf
(
location
+
5
,
"%d,%x,%x"
,
&
slot
,
&
map_base
,
&
core_base
);
}
else
return
-
1
;
card
=
svec_open
(
slot
);
svec_set_map_base
(
card
,
map_base
);
if
(
!
card
)
{
fprintf(stderr,"Can't map the SPEC @ %x:%x\n", bus, dev_fn
);
return -1;
fprintf
(
stderr
,
"SVEC probe failed.
\n
"
);
return
-
1
;
}
dev->writel = fd_spec_writel;
dev->readl = fd_spec_readl;
dev->base_addr = base;
dev
->
priv_io
=
card
;
dev
->
writel
=
fd_svec_writel
;
dev
->
readl
=
fd_svec_readl
;
dev
->
base_addr
=
core_base
;
//spec_vuart_init(dev->priv_io, 0xe0500); /* for communication with WRCore during DMTD calibration */
return 0;
dbg
(
"svec: using slot %d, A32/D32 base: 0x%x, core base 0x%x
\n
"
,
slot
,
map_base
,
core_base
);
return
0
;
}
#endif
static
void
fd_eb_writel
(
void
*
priv
,
uint32_t
data
,
uint32_t
addr
)
{
ebs_write
((
eb_device_t
)
priv
,
addr
,
data
);
}
void
loader_low_level
()
{};
static
uint32_t
fd_eb_readl
(
void
*
priv
,
uint32_t
addr
)
static
int
probe_spec
(
fdelay_device_t
*
dev
,
const
char
*
location
)
{
return
ebs_read
((
eb_device_t
)
priv
,
addr
)
;
}
uint32_t
core_base
;
int
slot
;
if
(
!
strncmp
(
location
,
"spec:"
),
5
)
{
sscanf
(
location
+
5
,
"%d,%x"
,
&
slot
,
&
core_base
);
}
else
return
-
1
;
dev
->
priv_io
=
spec_open
(
slot
,
-
1
);
#define VENDOR_CERN 0xce42
#define DEVICE_FD_CORE 0xf19ede1a
#define DEVICE_VUART 0xe2d13d04
if
(
!
dev
->
priv_io
)
{
fprintf
(
stderr
,
"Can't map the SPEC @ slot %d
\n
"
,
slot
);
return
-
1
;
}
dev
->
writel
=
fd_spec_writel
;
dev
->
readl
=
fd_spec_readl
;
dev
->
base_addr
=
core_base
;
dbg
(
"spec: using slot %d, core base 0x%x
\n
"
,
slot
,
core_base
);
return
0
;
}
int
fdelay_probe
(
fdelay_device_t
*
dev
,
const
char
*
location
)
{
int
bus
=
-
1
,
dev_fn
=
-
1
;
char
ip_addr
[
128
];
int
use_eb
=
0
;
uint32_t
base_core
;
if
(
!
strncmp
(
location
,
"eb:"
,
3
))
{
snprintf
(
ip_addr
,
sizeof
(
ip_addr
),
"udp/%s"
,
location
+
3
);
use_eb
=
1
;
}
else
if
(
!
strncmp
(
location
,
"spec:"
),
5
)
{
sscanf
(
location
+
5
,
"%d,%d"
,
&
bus
,
&
dev_fn
);
}
if
(
use_eb
)
{
dbg
(
"Probing with Etherbone [%s]
\n
"
,
ip_addr
);
if
(
ebs_init
()
!=
EB_OK
)
{
fprintf
(
stderr
,
"Can't initialize Etherbone library.
\n
"
);
return
-
1
;
}
if
(
ebs_open
((
eb_device_t
*
)
&
dev
->
priv_io
,
ip_addr
)
!=
EB_OK
)
{
fprintf
(
stderr
,
"Can't connect to Etherbone device %s.
\n
"
,
location
);
return
-
1
;
}
if
(
!
ebs_sdb_find_device
((
eb_device_t
)
dev
->
priv_io
,
VENDOR_CERN
,
DEVICE_FD_CORE
,
0
,
&
base_core
))
{
fprintf
(
stderr
,
"Can't detect the FD core. Is the bitstream loaded?
\n
"
,
location
);
return
-
1
;
}
dev
->
writel
=
fd_eb_writel
;
dev
->
readl
=
fd_eb_readl
;
dev
->
base_addr
=
base_core
;
dbg
(
"Found FD core @ 0x%x
\n
"
,
base_core
);
}
else
{
dbg
(
"Sorry, SPEC temporarily unsupported
\n
."
);
return
-
1
;
}
if
(
!
probe_svec
(
dev
,
location
))
return
0
;
if
(
!
probe_spec
(
dev
,
location
))
return
0
;
}
fdelay_device_t
*
fdelay_create
()
...
...
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