re-licence

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

re-licence
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
e7c0e506 · Federico Vaga · bad11788 · e7c0e506 · e7c0e506 · e7c0e506
Commit e7c0e506 authored Nov 14, 2022 by Federico Vaga
142 changed files
--- a/.gitmodules
+++ b/.gitmodules
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+
 [submodule "hdl/ip_cores/general-cores"]
 	path = hdl/ip_cores/general-cores
 	url = https://ohwr.org/project/general-cores.git

--- a/.reuse/dep5
+++ b/.reuse/dep5
+Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
+Upstream-Name: fmc-adc-100m14b4ch
+Upstream-Contact: Federico Vaga <federico.vaga@cern.ch>
+Source: https://ohwr.org/project/fmc-delay-1ns-8cha
+
+Files: doc/*
+Copyright: 2022 CERN (home.cern)
+License: CC-BY-SA-4.0+
+
+Files: hardware/*
+Copyright: 2022 CERN (home.cern)
+License: CERN-OHL-W-2.0+
--- a/CHANGELOG.rst
+++ b/CHANGELOG.rst
+.. SPDX-License-Identifier: CC-BY-SA-4.0+
 ..
-  SPDX-License-Identifier: CC-0.0
-  SPDX-FileCopyrightText: 2019 CERN
+.. SPDX-FileCopyrightText: 2019 CERN

 =========
 Changelog

--- a/LICENSES/CC-BY-SA-4.0.txt
+++ b/LICENSES/CC-BY-SA-4.0.txt
--- a/LICENSES/CERN-OHL-W-2.0.txt
+++ b/LICENSES/CERN-OHL-W-2.0.txt
--- a/LICENSES/LICENSE.GPL-2_0
+++ b/LICENSES/LICENSE.GPL-2_0
                    GNU GENERAL PUBLIC LICENSE
                       Version 2, June 1991

- Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc., <http://fsf.org/>
 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
 Everyone is permitted to copy and distribute verbatim copies
 of this license document, but changing it is not allowed.
@@ -290,8 +290,8 @@ to attach them to the start of each source file to most effectively
 convey the exclusion of warranty; and each file should have at least
 the "copyright" line and a pointer to where the full notice is found.

-    <one line to give the program's name and a brief idea of what it does.>
-    Copyright (C) <year>  <name of author>
+    spec-fmc-carrier
+    Copyright (C) 2019  CERN (https://home.cern)

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -329,7 +329,7 @@ necessary.  Here is a sample; alter the names:
  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
  `Gnomovision' (which makes passes at compilers) written by James Hacker.

-  <signature of Ty Coon>, 1 April 1989
+  {signature of Ty Coon}, 1 April 1989
  Ty Coon, President of Vice

 This General Public License does not permit incorporating your program into

--- a/LICENSES/LGPL-2.1-or-later.txt
+++ b/LICENSES/LGPL-2.1-or-later.txt
--- a/Manifest.py
+++ b/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 modules = {
    "local" : [
        "hdl/rtl",

--- a/README.md
+++ b/README.md
+<!--
+SPDX-FileCopyrightText: 2022 CERN (home.cern)
+
+SPDX-License-Identifier: CC-BY-SA-4.0+
+-->
+
 This repo contains the full source code (hardware + gateware + software) for the FmcDelay1ns4cha FMC module.
\ No newline at end of file
--- a/doc/doxygen-fd-config
+++ b/doc/doxygen-fd-config
-# SPDX-License-Identifier: CC0-1.0
+# SPDX-License-Identifier: CC-BY-SA-4.0+
 #
 # SPDX-FileCopyrightText: 2020 CERN


--- a/hdl/.gitignore
+++ b/hdl/.gitignore
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 *.*\#
 \#*
 .\#*

--- a/hdl/Manifest.py
+++ b/hdl/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 modules = {"local" : ["platform", "rtl"] }
\ No newline at end of file
--- a/hdl/include/acam_model.svh
+++ b/hdl/include/acam_model.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `timescale 1ps/1ps



--- a/hdl/include/ideal_timestamper.svh
+++ b/hdl/include/ideal_timestamper.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `include "timestamp.svh"

 module ideal_timestamper

--- a/hdl/include/jittery_delay.svh
+++ b/hdl/include/jittery_delay.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `timescale 10fs/10fs

 module jittery_delay

--- a/hdl/include/mc100ep195.vh
+++ b/hdl/include/mc100ep195.vh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `timescale 1ps/1ps

 module mc100ep195

--- a/hdl/include/random_pulse_gen.svh
+++ b/hdl/include/random_pulse_gen.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 module random_pulse_gen
  (
   input enable_i,

--- a/hdl/include/regs/fd_channel_regs.vh
+++ b/hdl/include/regs/fd_channel_regs.vh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `define ADDR_FD_DCR                    6'h0
 `define FD_DCR_ENABLE_OFFSET 0
 `define FD_DCR_ENABLE 32'h00000001

--- a/hdl/include/regs/fd_main_regs.vh
+++ b/hdl/include/regs/fd_main_regs.vh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `define ADDR_FD_RSTR                   8'h0
 `define FD_RSTR_RST_FMC_OFFSET 0
 `define FD_RSTR_RST_FMC 32'h00000001

--- a/hdl/include/timestamp.svh
+++ b/hdl/include/timestamp.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `ifndef __TIMESTAMP_SVH
 `define __TIMESTAMP_SVH


--- a/hdl/include/tunable_clock_gen.svh
+++ b/hdl/include/tunable_clock_gen.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `timescale 10fs/10fs

 module tunable_clock_gen

--- a/hdl/include/vme64x_bfm/components/sn74vmeh22501.v
+++ b/hdl/include/vme64x_bfm/components/sn74vmeh22501.v
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `timescale 1ns/1ns 

 module sn74vmeh22501 (

--- a/hdl/include/vme64x_bfm/svec_vme_buffers.svh
+++ b/hdl/include/vme64x_bfm/svec_vme_buffers.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `include "components/sn74vmeh22501.v"

 `include "vme64x_bfm.svh"

--- a/hdl/include/vme64x_bfm/vme64x_bfm.svh
+++ b/hdl/include/vme64x_bfm/vme64x_bfm.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `ifndef __VME64X_BFM_SVH
 `define __VME64X_BFM_SVH 1


--- a/hdl/platform/Manifest.py
+++ b/hdl/platform/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 files =["chipscope_icon.ngc",  "chipscope_ila.ngc", "fd_ddr_driver.vhd", "fd_ddr_pll.vhd" ]
--- a/hdl/platform/fd_ddr_driver.vhd
+++ b/hdl/platform/fd_ddr_driver.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Xilinx DDR driver
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/platform/fd_ddr_pll.vhd
+++ b/hdl/platform/fd_ddr_pll.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -- file: clk_wiz_v3_2.vhd
 -- 
 -- (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.

--- a/hdl/rtl/Manifest.py
+++ b/hdl/rtl/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 files = ["fd_acam_timestamper.vhd",
         "fd_ring_buffer.vhd",
         "fd_ts_adder.vhd",

--- a/hdl/rtl/build_wb.sh
+++ b/hdl/rtl/build_wb.sh
 #!/bin/bash

+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 wbgen2 -V fd_main_wishbone_slave.vhd -H record -p fd_main_wbgen2_pkg.vhd -K ../include/regs/fd_main_regs.vh -s defines -C fd_main_regs.h -f texinfo -D ../../doc/design-notes/fd_main_regs.in fd_main_wishbone_slave.wb 
 wbgen2 -V fd_channel_wishbone_slave.vhd -H record -p fd_channel_wbgen2_pkg.vhd -K ../include/regs/fd_channel_regs.vh -s defines -C fd_channel_regs.h -f texinfo -D ../../doc/design-notes/fd_channel_regs.in fd_channel_wishbone_slave.wb 
\ No newline at end of file
--- a/hdl/rtl/fd_acam_timestamp_postprocessor.vhd
+++ b/hdl/rtl/fd_acam_timestamp_postprocessor.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : ACAM TDX-GPX timestamp postprocessor
 -- Project    : Fine Delay Core (FmcDelay1ns4cha)

--- a/hdl/rtl/fd_acam_timestamper.vhd
+++ b/hdl/rtl/fd_acam_timestamper.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : ACAM TDC-GPX Timestamper
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_channel_wbgen2_pkg.vhd
+++ b/hdl/rtl/fd_channel_wbgen2_pkg.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 ---------------------------------------------------------------------------------------
 -- Title          : Wishbone slave core for Fine Delay Channel WB Slave
 ---------------------------------------------------------------------------------------

--- a/hdl/rtl/fd_channel_wishbone_slave.vhd
+++ b/hdl/rtl/fd_channel_wishbone_slave.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 ---------------------------------------------------------------------------------------
 -- Title          : Wishbone slave core for Fine Delay Channel WB Slave
 ---------------------------------------------------------------------------------------

--- a/hdl/rtl/fd_channel_wishbone_slave.wb
+++ b/hdl/rtl/fd_channel_wishbone_slave.wb
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -- -*- Mode: LUA; tab-width: 2 -*-

 -------------------------------------------------------------------------------

--- a/hdl/rtl/fd_csync_generator.vhd
+++ b/hdl/rtl/fd_csync_generator.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Counter Sync signal generator
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_delay_channel_driver.vhd
+++ b/hdl/rtl/fd_delay_channel_driver.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Precise Programmable Pulse Generator (single channel)
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_delay_line_arbiter.vhd
+++ b/hdl/rtl/fd_delay_line_arbiter.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -----------------------------------------------------------------------------
 -- Title      : SY89295U 4-input arbitration unit
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_dmtd_insertion_calibrator.vhd
+++ b/hdl/rtl/fd_dmtd_insertion_calibrator.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : DMTD-based insertion delay calibrator
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_dmtd_with_deglitcher.vhd
+++ b/hdl/rtl/fd_dmtd_with_deglitcher.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Digital DMTD Edge Tagger
 -- Project    : White Rabbit

--- a/hdl/rtl/fd_main_wbgen2_pkg.vhd
+++ b/hdl/rtl/fd_main_wbgen2_pkg.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 ---------------------------------------------------------------------------------------
 -- Title          : Wishbone slave core for Fine Delay Main WB Slave
 ---------------------------------------------------------------------------------------

--- a/hdl/rtl/fd_main_wishbone_slave.vhd
+++ b/hdl/rtl/fd_main_wishbone_slave.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 ---------------------------------------------------------------------------------------
 -- Title          : Wishbone slave core for Fine Delay Main WB Slave
 ---------------------------------------------------------------------------------------

--- a/hdl/rtl/fd_main_wishbone_slave.wb
+++ b/hdl/rtl/fd_main_wishbone_slave.wb
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -- -*- Mode: LUA; tab-width: 2 -*-

 -------------------------------------------------------------------------------

--- a/hdl/rtl/fd_reset_generator.vhd
+++ b/hdl/rtl/fd_reset_generator.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -----------------------------------------------------------------------------
 -- Title      : Reset unit.
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_ring_buffer.vhd
+++ b/hdl/rtl/fd_ring_buffer.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Timestamp Ring Buffer
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_spi_dac_arbiter.vhd
+++ b/hdl/rtl/fd_spi_dac_arbiter.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -----------------------------------------------------------------------------
 -- Title      : SPI Bus Master with arbitration
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_spi_master.vhd
+++ b/hdl/rtl/fd_spi_master.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -----------------------------------------------------------------------------
 -- Title      : SPI Bus Master
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_timestamper_stat_unit.vhd
+++ b/hdl/rtl/fd_timestamper_stat_unit.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -----------------------------------------------------------------------------
 -- Title      : TDC Statistics Unit
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fd_ts_adder.vhd
+++ b/hdl/rtl/fd_ts_adder.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Pipelined timestamp adder with normalization
 -- Project    : Fine Delay Core (FmcDelay1ns4cha)

--- a/hdl/rtl/fine_delay_core.vhd
+++ b/hdl/rtl/fine_delay_core.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Fine Delay VHDL Core (top level block)
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/fine_delay_pkg.vhd
+++ b/hdl/rtl/fine_delay_pkg.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Fine Delay VHDL Core (main package)
 -- Project    : Fine Delay FMC (fmc-delay-1ns-4cha)

--- a/hdl/rtl/timing/fd_dmtd_with_deglitcher.vhd
+++ b/hdl/rtl/timing/fd_dmtd_with_deglitcher.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : Digital DMTD Edge Tagger
 -- Project    : White Rabbit

--- a/hdl/rtl/timing/fd_hpll_period_detect.vhd
+++ b/hdl/rtl/timing/fd_hpll_period_detect.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 -------------------------------------------------------------------------------
 -- Title      : DMTD Helper PLL (HPLL) - linear frequency/period detector.
 -- Project    : White Rabbit Switch

--- a/hdl/syn/spec/Manifest.py
+++ b/hdl/syn/spec/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 target = "xilinx"
 action = "synthesis"


--- a/hdl/syn/svec/Manifest.py
+++ b/hdl/syn/svec/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 board  = "svec"
 target = "xilinx"
 action = "synthesis"

--- a/hdl/testbench/adder_test/Manifest.py
+++ b/hdl/testbench/adder_test/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 action = "simulation"

 vlog_opt="+incdir+../../include"

--- a/hdl/testbench/adder_test/main.sv
+++ b/hdl/testbench/adder_test/main.sv
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 //#`include "simdrv_defs.svh"

 `timescale 1ns/1ps

--- a/hdl/testbench/adder_test/run.do
+++ b/hdl/testbench/adder_test/run.do
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 make

 vsim -L XilinxCoreLib work.main -voptargs="+acc"

--- a/hdl/testbench/old_top/Manifest.py
+++ b/hdl/testbench/old_top/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 target = "xilinx"
 action = "simulation"


--- a/hdl/testbench/old_top/main.sv
+++ b/hdl/testbench/old_top/main.sv
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `timescale 10fs/10fs

 `include "acam_model.svh"

--- a/hdl/testbench/old_top/run.do
+++ b/hdl/testbench/old_top/run.do
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 #make

 vsim -L XilinxCoreLib work.main -voptargs="+acc"

--- a/hdl/testbench/old_top/wave.do
+++ b/hdl/testbench/old_top/wave.do
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 onerror {resume}
 quietly WaveActivateNextPane {} 0
 add wave -noupdate /main/DUT/chx_delay_pulse0

--- a/hdl/testbench/spec_wr_top/Manifest.py
+++ b/hdl/testbench/spec_wr_top/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 ctrls = ["bank3_32b_32b"]
 action = "simulation"
 target = "xilinx"

--- a/hdl/testbench/spec_wr_top/main.sv
+++ b/hdl/testbench/spec_wr_top/main.sv
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `timescale 1ns/1ps

 `include "simdrv_defs.svh"   

--- a/hdl/testbench/spec_wr_top/run.do
+++ b/hdl/testbench/spec_wr_top/run.do
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 #vlog -sv main.sv +incdir+"." +incdir+gn4124_bfm +incdir+../../include/wb +incdir+../../include
 #make -f Makefile
 vsim -L unisim -L secureip work.main -voptargs="+acc" -t 10fs -novopt 

--- a/hdl/testbench/spec_wr_top/simdrv_fine_delay.svh
+++ b/hdl/testbench/spec_wr_top/simdrv_fine_delay.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `include "regs/fd_main_regs.vh"
 `include "regs/fd_channel_regs.vh"


--- a/hdl/testbench/spec_wr_top/vhd_wishbone_master.svh
+++ b/hdl/testbench/spec_wr_top/vhd_wishbone_master.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `ifndef __VHD_WISHBONE_MASTER_INCLUDED
 `define __VHD_WISHBONE_MASTER_INCLUDED


--- a/hdl/testbench/spec_wr_top/wave.do
+++ b/hdl/testbench/spec_wr_top/wave.do
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 onerror {resume}
 quietly WaveActivateNextPane {} 0
 add wave -noupdate -group SpecBase /main/DUT/inst_spec_base/clk_125m_pllref_p_i

--- a/hdl/testbench/svec_wr_top/Manifest.py
+++ b/hdl/testbench/svec_wr_top/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 ctrls = ["bank3_32b_32b"]
 action = "simulation"
 target = "xilinx"

--- a/hdl/testbench/svec_wr_top/fdelay_board.svh
+++ b/hdl/testbench/svec_wr_top/fdelay_board.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `timescale 10fs/10fs

 `include "acam_model.svh"

--- a/hdl/testbench/svec_wr_top/main.sv
+++ b/hdl/testbench/svec_wr_top/main.sv
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `include "vme64x_bfm.svh"
 `include "svec_vme_buffers.svh"


--- a/hdl/testbench/svec_wr_top/run.do
+++ b/hdl/testbench/svec_wr_top/run.do
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 #vlog -sv main.sv +incdir+. +incdir+../../include/wb +incdir+../../include/vme64x_bfm +incdir+../../include
 vsim -t 1ps work.main -novopt -L unisim


--- a/hdl/testbench/svec_wr_top/simdrv_fine_delay.svh
+++ b/hdl/testbench/svec_wr_top/simdrv_fine_delay.svh
+// SPDX-FileCopyrightText: 2022 CERN (home.cern)
+//
+// SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 `include "regs/fd_main_regs.vh"
 `include "regs/fd_channel_regs.vh"


--- a/hdl/testbench/svec_wr_top/wave.do
+++ b/hdl/testbench/svec_wr_top/wave.do
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 onerror {resume}
 quietly WaveActivateNextPane {} 0
 add wave -noupdate -group Top /main/DUT/rst_n_i

--- a/hdl/top/spec/Manifest.py
+++ b/hdl/top/spec/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 files = ["spec_fine_delay_top.vhd", "spec_fine_delay_top.ucf"]

 fetchto = "../../ip_cores"

--- a/hdl/top/spec/spec_fine_delay_top.ucf
+++ b/hdl/top/spec/spec_fine_delay_top.ucf
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+

 ####################################################################################
 # FineDelay V3/V4 pins

--- a/hdl/top/spec/spec_fine_delay_top.vhd
+++ b/hdl/top/spec/spec_fine_delay_top.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 --------------------------------------------------------------------------------
 -- CERN BE-CO-HT
 -- Fine Delay Mezzanine (fmc-fine-delay)

--- a/hdl/top/svec/Manifest.py
+++ b/hdl/top/svec/Manifest.py
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 files = ["svec_fine_delay_top.vhd", "svec_fine_delay_top.ucf"]

 fetchto = "../../ip_cores"

--- a/hdl/top/svec/svec_fine_delay_top.ucf
+++ b/hdl/top/svec/svec_fine_delay_top.ucf
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 # <ucfgen_start>

 # This section has bee generated automatically by ucfgen.py. Do not hand-modify if not really necessary.

--- a/hdl/top/svec/svec_fine_delay_top.vhd
+++ b/hdl/top/svec/svec_fine_delay_top.vhd
+-- SPDX-FileCopyrightText: 2022 CERN (home.cern)
+--
+-- SPDX-License-Identifier: CERN-OHL-W-2.0+
+
 --------------------------------------------------------------------------------
 -- CERN BE-CO-HT
 -- Fine Delay Mezzanine (fmc-fine-delay)

--- a/software/.gitignore
+++ b/software/.gitignore
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+
 *.o
 *.ko
 *~

--- a/software/Makefile
+++ b/software/Makefile
+# SPDX-FileCopyrightText: 2022 CERN (home.cern)
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+
 # include parent_common.mk for buildsystem's defines
 # use absolute path for REPO_PARENT
 REPO_PARENT ?= $(shell pwd)/../..

--- a/software/README.rst
+++ b/software/README.rst
+.. SPDX-FileCopyrightText: 2022 CERN (home.cern)
+..
+.. SPDX-License-Identifier: LGPL-2.1-or-later
+
 Please check doc/