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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
Commits
d61f5071
Commit
d61f5071
authored
Aug 31, 2011
by
Tomasz Wlostowski
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fd_gpio: naming fixes after moving the code to a separate unit
parent
7477ad9d
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1 changed file
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12 additions
and
11 deletions
+12
-11
fd_gpio.vhd
hdl/rtl/fd_gpio.vhd
+12
-11
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hdl/rtl/fd_gpio.vhd
View file @
d61f5071
...
...
@@ -30,9 +30,10 @@ end fd_gpio;
architecture
rtl
of
fd_gpio
is
begin
-- rtl
regs_b
<=
c_fd_registers_init_value
;
p_gpio_loads
:
process
(
clk_sys_i
)
begin
if
rising_edge
(
clk_sys_i
)
then
...
...
@@ -43,34 +44,34 @@ begin -- rtl
spi_sclk_o
<=
'0'
;
spi_mosi_o
<=
'0'
;
regs
.
gprr_miso_i
<=
'0'
;
regs
_b
.
gprr_miso_i
<=
'0'
;
else
if
(
regs
.
gpsr_cs_pll_wr_o
=
'1'
and
regs
.
gpsr_cs_pll_o
=
'1'
)
then
if
(
regs
_b
.
gpsr_cs_pll_wr_o
=
'1'
and
regs_b
.
gpsr_cs_pll_o
=
'1'
)
then
spi_cs_pll_n_o
<=
'1'
;
elsif
(
regs
.
gpcr_cs_pll_wr_o
=
'1'
and
regs
.
gpcr_cs_pll_o
=
'1'
)
then
elsif
(
regs
_b
.
gpcr_cs_pll_wr_o
=
'1'
and
regs_b
.
gpcr_cs_pll_o
=
'1'
)
then
spi_cs_pll_n_o
<=
'0'
;
end
if
;
if
(
regs
.
gpsr_cs_gpio_wr_o
=
'1'
and
regs
.
gpsr_cs_gpio_o
=
'1'
)
then
if
(
regs
_b
.
gpsr_cs_gpio_wr_o
=
'1'
and
regs_b
.
gpsr_cs_gpio_o
=
'1'
)
then
spi_cs_gpio_n_o
<=
'1'
;
elsif
(
regs
.
gpcr_cs_gpio_wr_o
=
'1'
and
regs
.
gpcr_cs_gpio_o
=
'1'
)
then
elsif
(
regs
_b
.
gpcr_cs_gpio_wr_o
=
'1'
and
regs_b
.
gpcr_cs_gpio_o
=
'1'
)
then
spi_cs_gpio_n_o
<=
'0'
;
end
if
;
if
(
regs
.
gpsr_mosi_wr_o
=
'1'
and
regs
.
gpsr_mosi_o
=
'1'
)
then
if
(
regs
_b
.
gpsr_mosi_wr_o
=
'1'
and
regs_b
.
gpsr_mosi_o
=
'1'
)
then
spi_mosi_o
<=
'1'
;
elsif
(
regs
.
gpcr_mosi_wr_o
=
'1'
and
regs
.
gpcr_mosi_o
=
'1'
)
then
elsif
(
regs
_b
.
gpcr_mosi_wr_o
=
'1'
and
regs_b
.
gpcr_mosi_o
=
'1'
)
then
spi_mosi_o
<=
'0'
;
end
if
;
if
(
regs
.
gpsr_sclk_wr_o
=
'1'
and
regs
.
gpsr_sclk_o
=
'1'
)
then
if
(
regs
_b
.
gpsr_sclk_wr_o
=
'1'
and
regs_b
.
gpsr_sclk_o
=
'1'
)
then
spi_sclk_o
<=
'1'
;
elsif
(
regs
.
gpcr_sclk_wr_o
=
'1'
and
regs
.
gpcr_sclk_o
=
'1'
)
then
elsif
(
regs
_b
.
gpcr_sclk_wr_o
=
'1'
and
regs_b
.
gpcr_sclk_o
=
'1'
)
then
spi_sclk_o
<=
'0'
;
end
if
;
regs
.
gprr_miso_i
<=
spi_miso_i
;
regs
_b
.
gprr_miso_i
<=
spi_miso_i
;
end
if
;
end
if
;
end
process
;
...
...
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