hdl/top/svec: slot order according to the front panel. SDB addresses in…
hdl/top/svec: slot order according to the front panel. SDB addresses in ascending order. Fixed wrong WR Core SDB bridge address.
Showing
This source diff could not be displayed because it is too large.
You can
view the blob
instead.
This diff is collapsed.
Please
register
or
sign in
to comment