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FMC DEL 1ns 4cha
Commit a21d0b54 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
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[top/syn]/svec/wr: SVEC top level with new VME Core, working WR Core and Etherbone

parent 57dd2715
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Showing with 638 additions and 615 deletions
hdl/syn/svec/wr/Manifest.py
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......@@ -9,4 +9,5 @@ syn_package = "fgg900"
syn_top = "svec_top"
syn_project = "svec_fine_delay.xise"
files = [ "wrc.ram" ]
modules = { "local" : [ "../../../top/svec/wr", "../../../platform" ] }
hdl/syn/svec/wr/svec_fine_delay.xise
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hdl/top/svec/wr/Manifest.py
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files = [ "svec_top.vhd", "svec_top.ucf", "xvme64x_core.vhd", "spec_serial_dac.vhd" ]
files = [ "svec_top.vhd", "svec_top.ucf", "xvme64x_core.vhd" ]
fetchto = "../../../ip_cores"
modules = {
"local" : ["../../../rtl", "../../../platform", "../../../ip_cores/vme64x-core" ],
"git" : [ "git://ohwr.org/hdl-core-lib/wr-cores.git::wishbonized" ]
# "svn" : [ "http://svn.ohwr.org/vme64x-core/trunk/hdl/vme64x-core/rtl" ]
"local" : ["../../../rtl", "../../../platform" ],
"git" : [ "git://ohwr.org/hdl-core-lib/wr-cores.git",
"git://ohwr.org/hdl-core-lib/etherbone-core.git" ],
"svn" : [ "http://svn.ohwr.org/vme64x-core/trunk/hdl/vme64x-core/rtl" ]
}
hdl/top/svec/wr/svec_top.ucf
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......@@ -360,8 +360,8 @@ NET "fd1_clk_ref_p_i" TNM_NET = fd1_clk_ref_p_i;
TIMESPEC TS_fd1_clk_ref_p_i = PERIOD "fd1_clk_ref_p_i" 8 ns HIGH 50%;
NET "fd1_clk_ref_n_i" TNM_NET = fd1_clk_ref_n_i;
TIMESPEC TS_fd1_clk_ref_n_i = PERIOD "fd1_clk_ref_n_i" 8 ns HIGH 50%;
NET "gen_with_phy.U_GTP/ch0_gtp_clkout_int<1>" TNM_NET = gen_with_phy.U_GTP/ch0_gtp_clkout_int<1>;
TIMESPEC TS_gen_with_phy_U_GTP_ch0_gtp_clkout_int_1_ = PERIOD "gen_with_phy.U_GTP/ch0_gtp_clkout_int<1>" 8 ns HIGH 50%;
#NET "gen_with_phy.U_GTP/ch0_gtp_clkout_int<1>" TNM_NET = gen_with_phy.U_GTP/ch0_gtp_clkout_int<1>;
#TIMESPEC TS_gen_with_phy_U_GTP_ch0_gtp_clkout_int_1_ = PERIOD "gen_with_phy.U_GTP/ch0_gtp_clkout_int<1>" 8 ns HIGH 50%;
NET "gen_with_phy.U_GTP/ch1_gtp_clkout_int<1>" TNM_NET = gen_with_phy.U_GTP/ch1_gtp_clkout_int<1>;
TIMESPEC TS_gen_with_phy_U_GTP_ch1_gtp_clkout_int_1_ = PERIOD "gen_with_phy.U_GTP/ch1_gtp_clkout_int<1>" 8 ns HIGH 50%;
......
hdl/top/svec/wr/svec_top.vhd
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hdl/top/svec/wr/xvme64x_core.vhd
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