fd_reset_generator: naming fixes after moving the code to a separate unit

9e5f27f9 · Tomasz Wlostowski · d61f5071 · 9e5f27f9
Commit 9e5f27f9 authored Aug 31, 2011 by Tomasz Wlostowski
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fd_reset_generator.vhd hdl/rtl/fd_reset_generator.vhd +6 -1

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--- a/hdl/rtl/fd_reset_generator.vhd
+++ b/hdl/rtl/fd_reset_generator.vhd
@@ -28,13 +28,16 @@ architecture behavioral of fd_reset_generator is

 begin  -- behavioral

+
+  regs_b <= c_fd_registers_init_value;
+  
  p_soft_reset : process(clk_sys_i)
  begin
    if rising_edge(clk_sys_i) then
      if(rst_n_i = '0') then
        rstn_host_sysclk <= '0';
      else
-        if(regs.rstr_wr_o = '1' and regs.rstr_o = c_RSTR_TRIGGER_VALUE) then
+        if(regs_b.rstr_wr_o = '1' and regs_b.rstr_o = c_RSTR_TRIGGER_VALUE) then
          rstn_host_sysclk <= '0';
        else
          rstn_host_sysclk <= '1';
@@ -43,6 +46,8 @@ begin  -- behavioral
    end if;
  end process;

+
+
  p_sync_reset_refclk : process(clk_ref_i)
  begin
    if rising_edge(clk_ref_i) then