Commit 711dc807 authored by Greg's avatar Greg Committed by Tomasz Wlostowski

Sch/PCB: Fixed wrong component annotation

git-svn-id: http://svn.ohwr.org/fmc-delay-1ns-8cha@9 1bcb1fca-75bf-43fa-9ae8-4d3013b6ad5d
parent 475f1683
[Design]
Version=1.0
HierarchyMode=0
HierarchyMode=2
ChannelRoomNamingStyle=0
OutputPath=Project Outputs for FMC_Delay_1ns_4Cha
LogFolderPath=
......@@ -13,7 +13,7 @@ SeparateFolders=0
PinSwapBy_Netlabel=1
PinSwapBy_Pin=1
AllowPortNetNames=0
AllowSheetEntryNetNames=1
AllowSheetEntryNetNames=0
AppendSheetNumberToLocalNets=0
NetlistSinglePinNets=0
DefaultConfiguration=
......@@ -840,13 +840,13 @@ Type6=2
Type7=1
Type8=1
Type9=1
Type10=1
Type10=0
Type11=2
Type12=2
Type13=2
Type14=1
Type15=1
Type16=1
Type14=0
Type15=0
Type16=0
Type17=1
Type18=1
Type19=1
......@@ -883,7 +883,7 @@ Type49=1
Type50=2
Type51=1
Type52=1
Type53=1
Type53=0
Type54=1
Type55=1
Type56=2
......@@ -932,19 +932,19 @@ Type98=0
[ERC Connection Matrix]
L1=NNNNNNNNNNNWNNNWW
L2=NNWNNNNWWWNWNWNWN
L3=NWEENEEEENEWNEEWN
L4=NNENNNWEENNWNENWN
L2=NNNNNNNNNNNWNWNWN
L3=NNEENEEENNNWNEEWN
L4=NNENNNWENNNWNENWN
L5=NNNNNNNNNNNNNNNNN
L6=NNENNNNEENNWNENWN
L7=NNEWNNWEENNWNENWN
L8=NWEENEENEEENNEENN
L9=NWEENEEEENEWNEEWW
L10=NWNNNNNENNEWNNEWN
L11=NNENNNNEEENWNENWN
L7=NNEWNNWNENNWNENWN
L8=NNEENENNEEENNEENN
L9=NNNNNEEEENEWNEEWW
L10=NNNNNNNENNNWNNEWN
L11=NNNNNNNEENNWNNNWN
L12=WWWWNWWNWWWNWWWNN
L13=NNNNNNNNNNNWNNNWW
L14=NWEENEEEENEWNEEWW
L14=NWEENEEEENNWNEEWW
L15=NNENNNNEEENWNENWW
L16=WWWWNWWNWWWNWWWNW
L17=WNNNNNNNWNNNWWWWN
......
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