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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
Commits
6c14330f
Commit
6c14330f
authored
Jun 06, 2012
by
Tomasz Wlostowski
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hdl/rtl/fd_delay_channel_driver: force output to 1 when DCR.FORCE_HI bit set
parent
ff2a679f
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fd_delay_channel_driver.vhd
hdl/rtl/fd_delay_channel_driver.vhd
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hdl/rtl/fd_delay_channel_driver.vhd
View file @
6c14330f
...
...
@@ -6,7 +6,7 @@
-- Author : Tomasz Wlostowski
-- Company : CERN
-- Created : 2011-08-24
-- Last update: 2012-0
2-29
-- Last update: 2012-0
6-01
-- Platform : FPGA-generic
-- Standard : VHDL'93
-------------------------------------------------------------------------------
...
...
@@ -481,8 +481,8 @@ begin
delay_load_o
<=
'0'
;
first_pulse
<=
'1'
;
first_pulse_till_hit
<=
'0'
;
delay_pulse1_o
<=
'0'
;
delay_pulse0_o
<=
'0'
;
delay_pulse1_o
<=
regs_in
.
dcr_force_hi_o
;
delay_pulse0_o
<=
regs_in
.
dcr_force_hi_o
;
delay_idle_o
<=
'1'
;
...
...
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