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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
Commits
282bc2d8
Commit
282bc2d8
authored
Dec 14, 2022
by
Dimitris Lampridis
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hdl: increase ISE effort to meet timing
parent
c0035ded
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syn_extra_steps.tcl
hdl/syn/svec/syn_extra_steps.tcl
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hdl/syn/svec/syn_extra_steps.tcl
View file @
282bc2d8
...
@@ -28,8 +28,8 @@ xilinx::project set "Pack I/O Registers/Latches into IOBs" "For Inputs and Outpu
...
@@ -28,8 +28,8 @@ xilinx::project set "Pack I/O Registers/Latches into IOBs" "For Inputs and Outpu
xilinx::project set
"Register Balancing"
"Yes"
xilinx::project set
"Register Balancing"
"Yes"
xilinx::project set
"Register Duplication Map"
"On"
xilinx::project set
"Register Duplication Map"
"On"
#
xilinx::project set "Placer Extra Effort Map" "Normal"
xilinx::project set
"Placer Extra Effort Map"
"Normal"
#
xilinx::project set "Extra Effort (Highest PAR level only
)
" "
Normal
"
xilinx::project set
"Extra Effort (Highest PAR level only)"
"Normal"
#xilinx::project set "Keep Hierarchy" "Yes"
#xilinx::project set "Keep Hierarchy" "Yes"
...
...
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