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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
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3b69f101c5a3c4cc070b28309e1d005ead29aa96
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fmc-delay-1ns-8cha
hdl
rtl
fd_main_wishbone_slave.wb
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hdl: keep IODELAY adjustments in clk_ref clock domain, increase taps register length to 8 bits
· 3b69f101
Tomasz Wlostowski
authored
Dec 02, 2020
3b69f101
fd_main_wishbone_slave.wb
35.5 KB
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