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  SPDX-License-Identifier: CC-0.0
  SPDX-FileCopyrightText: 2019 CERN

=========
Changelog
=========

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3.0.8 - 2021-03-17
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Changed
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- hdl: svec-base updated to 2.0, for the FD there are no incompatible changes
- sw,hdl: compact memory map [we know, do not ask]

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3.0.7 - 2021-02-24
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Added
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- sw: show the input status from the fmc-fdelay-status tool
- sw: use the fmc-fdelay-input tool to change the input status

Fixed
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- sw: make clear in the tools' help message that the device ID is an
  hexadecimal number

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3.0.6 - 2021-01-20
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Fixed
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- sw: open_by_lun() conversion from LUN to ID

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3.0.5 - 2020-12-14
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Fixed
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- sw: open_by_lun() path to /dev/ device changed

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3.0.4 - 2020-12-11
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Changed
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- hdl: include fixes from SPEC and SVEC

Added
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- sw: add symlink to FMC slot in sysfs

Fixed
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- sw: IPMI header
- tst: timeout computation was wrong in some cases and very very long

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3.0.3 - 2020-10-07
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Changed
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- drv: ZIO device parent is, correctly, the Fine-Delay platform
  device. Before it did not have any parent so this change should not
  break anything.

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3.0.2 - 2020-09-25
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Added
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- bld: cppcheck target for software

Fixed
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- sw: SVEC, load device driver instance only if the mezzanine is present.

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3.0.1 - 2020-06-04
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Changed
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- sw: version reporting in sysfs include the full output from 'git describe'

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3.0.0 - 2020-06-02
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Added
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- First release of Convention-based Fine Delay HW/GW/SW.
- Added programmable delay line on the TDC start FPGA input to compensate for different delays on
  TDC start signal from different production batches of the boards.