#BIG WARNING: the offsets in this file are for the hacked version of fdelay-gs, which uses fdelay test program instead of the real driver.
# use with caution!
#Path to the timestamp log file
log_file ./pp.log

#######################
# Select board 0
#######################

board 0
# Hardware index if the board (i.e. the PCIe bus/dev)
location eb:192.168.10.11

# Select termination (warning! affects the accuracy!)
termination 0

# WARNING!!! These are fine delay card calibration values, obtained with time interval measurements.
# Don't change unless you know what you are doing.

# WARNING 2: define these for ALL boards independently

input_offset -63100p
output_offset 14400p

# Output configuration
# out output_ID offset_from_pps[ps] width[ps] period[ps]

# out 1 = PPS signal, 1us pulse width
out 1   0 100m 1s
out 2   0 500u 1000u
out 4   0 500u 1000u
out 4   0 10u  99999990p

# #######################
# # Select board 1
# #######################
# 
#\board 1
#hw_index 0x0500
 
#input_offset -63100p
#output_offset 14400p
#termination 1
 
#out 1   0 500u 1000u
#out 2   0 500u 1000u
#out 4   0 500u 1000u
#out 3 0 100u 200u
