FMC DEL 1ns 2cha issueshttps://ohwr.org/project/fmc-del-1ns-2cha/issues2024-02-13T11:31:42Zhttps://ohwr.org/project/fmc-del-1ns-2cha/issues/15Cannot generate subsequent bunches with 40MHz clock2024-02-13T11:31:42ZTom LevensCannot generate subsequent bunches with 40MHz clockWhen running with a 40MHz clock it is not possible to generate subsequent bunches. But generating every second works OK.https://ohwr.org/project/fmc-del-1ns-2cha/issues/7Bad-state recovery does not work2023-03-01T07:20:08ZTom LevensBad-state recovery does not workThe "bad-state" recovery function does not work. If the rising edge of D
is not detected, then the board deadlocks in state 1.
On the two prototypes, the AND gate has been bypassed to feed directly
the set pulse to the phase detector. This allows software to force the
device to state 3 by issuing two set pulses in a row.
### Files
* [sch.png](/uploads/ea7310311e054059e742fe35ee32d0df/sch.png)Jan PospisilJan Pospisilhttps://ohwr.org/project/fmc-del-1ns-2cha/issues/6Add LEDs on power supplies2023-03-01T07:20:15ZTom LevensAdd LEDs on power suppliesAdd LEDs on power supplies for visual inspection.Jan PospisilJan Pospisilhttps://ohwr.org/project/fmc-del-1ns-2cha/issues/5Add power supply test points on top of board2023-03-01T07:20:24ZTom LevensAdd power supply test points on top of boardAdd test points for all power supplies on top side of board.Jan PospisilJan Pospisilhttps://ohwr.org/project/fmc-del-1ns-2cha/issues/4Independent Trigger Latency for the two channels2023-03-01T07:20:31ZMichael BetzIndependent Trigger Latency for the two channelsJan PospisilJan Pospisilhttps://ohwr.org/project/fmc-del-1ns-2cha/issues/3Trace length matching2023-03-01T07:19:58ZJan PospisilTrace length matchingAll clock traces from clock buffer ADCLK944 to NB4L52 (nets
CLK\_**\_**\_P/N) have to be matched.
All input set/reset traces from FMC connector to NB4L52 (nets
IN\_SET/RES\_\*\_P/N) have to be matched.
All set/reset pulse traces from NB4L52 to MC100EP140 (via MC100EP195,
nets SET/RST\_***P/N and SET/RST\_DELAY***\_P/N) have to be matched.
Both pulse outputs from MC100EP140 to the front panel connector have to
be matched.Jan PospisilJan Pospisil