Commits · master · Projects / FMC DEL 1ns 2cha

10 Apr, 2017 1 commit
- comments, typos · 62381b86
  Jan Pospisil authored Apr 10, 2017
  
  62381b86
04 Apr, 2017 1 commit
- added AD9512 SPI mux (between automatic configuration and WB access) · 52f577fb
  Jan Pospisil authored Apr 04, 2017
  
  52f577fb
19 Dec, 2016 1 commit
- added wbgen2 generated files · b21ab4a0
  Jan Pospisil authored Dec 19, 2016
  
  b21ab4a0
19 Oct, 2016 1 commit
- added HTMl generated documentation for WB slaves · 94b0fd86
  Jan Pospisil authored Oct 19, 2016
  
  94b0fd86
27 Sep, 2016 2 commits
- updated block diagram and timing example · 3a392fca
  Jan Pospisil authored Sep 27, 2016
```
added timing closure analysis diagram
```
  3a392fca
- added programmers documentation (block diagram and timing example) · d0df5c6a
  Jan Pospisil authored Sep 27, 2016
  
  d0df5c6a
21 Sep, 2016 1 commit
- added documentation for AD9512 fine delay · 4a7a82b0
  Jan Pospisil authored Sep 21, 2016
  
  4a7a82b0
29 Jul, 2016 1 commit
- added "clock dividers synchronization" function to the specification · f1b64718
  Jan Pospisil authored Jul 29, 2016
  
  f1b64718
04 Jul, 2016 1 commit
- added trigger latency specification (not implemented yet); renamed some WB… · a4f3e56c
  Jan Pospisil authored Jul 04, 2016
```
added trigger latency specification (not implemented yet); renamed some WB registers to better reflect it purpose
```
  a4f3e56c
28 Jun, 2016 1 commit
- initial commit, first few files · 44dc14fe
  Jan Pospisil authored Jun 28, 2016
  
  44dc14fe