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FMC DEL 1ns 2cha
Commit 4c8365c3 authored by Jan Pospisil's avatar Jan Pospisil
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slight improvement to SW driver

parent 95c418f9
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Showing with 79 additions and 47 deletions
sw/FFPG_driver.py
View file @ 4c8365c3
......@@ -4,12 +4,6 @@ import sys
sys.path.append('/usr/local/encore')
import encoreio
# this version of python doesn't know enum :(
# taken from: http://stackoverflow.com/a/1695250
def enum(*sequential, **named):
enums = dict(zip(sequential, range(len(sequential))), **named)
return type('Enum', (), enums)
class ConColors:
BLACK = '\033[30m'
RED = '\033[31m'
......@@ -25,26 +19,56 @@ class ConColors:
m = encoreio.Module.get_instance('fmc_fpg', 0)
WB_DEBUG = False
WB_DEBUG = True
###################################################################
## WishBone access overlay
###################################################################
def WbRead(register):
result = m.read(register)[0]
if WB_DEBUG:
print('WB_READ: ['+register+'] = '+hex(result))
print(ConColors.MAGENTA+'WB_READ:'+ConColors.NONE+' ['+register+'] = '+hex(result))
return result
def WbWrite(register, data):
if WB_DEBUG:
print('WB_WRITE: ['+register+'] <- '+hex(data))
print(ConColors.CYAN+'WB_WRITE:'+ConColors.NONE+' ['+register+'] <- '+hex(data))
m.write(register, (data,))
def WbSetBits(register, mask, bits):
value = WbRead(register)
value &= (~mask)
value |= (bits & mask)
WbWrite(register, value)
def WbReadMulti(register, start = 0, to = -1):
result = m.read(register, start=start, to=to)
if WB_DEBUG:
print(ConColors.MAGENTA+'WB_READ_MULTI:'+ConColors.NONE+' ['+register+']('+str(start)+':'+str(to)+') = ' + ', '.join([hex(x) for x in result]))
return result
def WbWriteMulti(register, data, start = 0, to = -1):
if WB_DEBUG:
print('WB_WRITE_MULTI: ['+register+']('+str(start)+':'+str(to)+')')
print('<- ')
print([hex(x) for x in data])
print(ConColors.CYAN+'WB_WRITE_MULTI:'+ConColors.NONE+' ['+register+']('+str(start)+':'+str(to)+') <- ' + ', '.join([hex(x) for x in data]))
m.write(register, data, start=start, to=to)
def WbSetBitsMulti(register, mask, bits, start = 0, to = -1):
if len(mask) != len(bits):
raise Exception('Different MASK and BITS length!')
values = WbReadMulti(register, start, to)
values = list(values)
if len(values) != len(mask):
raise Exception('Different length of MASK/BITS and actual data!');
for i in range(len(values)):
values[i] &= (~mask[i])
values[i] |= (bits[i] & mask[i])
WbWriteMulti(register, values, start, to)
###################################################################
## SPI functions
###################################################################
def SpiInit():
WbWrite('spi_ss', 1)
WbWrite('spi_divider', 2)
......@@ -61,6 +85,10 @@ def SpiWrite(register, data):
WbWrite('spi_tx_rx_0', inst)
WbSetBits('spi_ctrl', 0x100, 0x100)
###################################################################
## FFPG specific functions
###################################################################
def Ad9512Init():
# power down unused output (OUT2)
SpiWrite(0x3f, 0x03)
......@@ -83,12 +111,6 @@ def Ad9512Init():
# confirm write
SpiWrite(0x5a, 1)
def WbSetBits(register, mask, bits):
value = WbRead(register)
value &= (~mask)
value |= (bits & mask)
WbWrite(register, value)
# 0 - front panel clock
# 1 - FPGA loop clock
# 2 - oscilator
......@@ -180,13 +202,15 @@ def ConfigurePulse(channel, start, stop, pulse):
if (stop < start):
raise Exception("Bad order!")
pulse &= 1
position = start/32
shift = start%32
WbWriteMulti(address+'set_mem', ((pulse<<shift),), start=position, to=position+1)
WbSetBitsMulti(address+'set_mem', ((1<<shift),), ((pulse<<shift),), start=position, to=position+1)
position = stop/32
shift = stop%32
WbWriteMulti(address+'res_mem', ((pulse<<shift),), start=position, to=position+1)
WbSetBitsMulti(address+'res_mem', ((1<<shift),), ((pulse<<shift),), start=position, to=position+1)
def CreatePulse(channel, start, stop):
ConfigurePulse(channel, start, stop, 1)
......@@ -194,33 +218,6 @@ def CreatePulse(channel, start, stop):
def DeletePulse(channel, start, stop):
ConfigurePulse(channel, start, stop, 0)
# print(hex(SpiRead(0x4c)))
def Init():
WbWrite('control', 0)
SpiInit()
Ad9512Init()
SetTriggerThreshold(0.5)
SelectClock(0)
SetVcxoFrequency(-0.2105) # 125.0000 MHz
ClearMemory(0, '*')
def TestPulse(channel = 1):
# configure channel
WbWrite('overflow', 17820)
WbWrite('trig_latency', 10)
CreatePulse(channel, 5, 10)
CreatePulse(channel, 25, 30)
CreatePulse(channel, 125, 130)
WbWrite('ch'+str(channel)+'_delay_set', 100)
WbWrite('ch'+str(channel)+'_delay_res', 200)
# start channel
channel -= 1
channel %= 2
WbSetBits('control', 0x4<<channel, 0x4<<channel) # set output enable
channel *= 2
WbSetBits('control', 0x30<<channel, 0x10<<channel) # set mode CONT.
def PrintBit(value, bit, label, ifSet, ifNotSet):
print(' '+'['+str(bit)+']'+label+':')
if value & (1<<bit):
......@@ -251,10 +248,45 @@ def Control():
PrintBit(control, 6, 'Channel 2 mode', 'continuous', 'stop/one-shot')
PrintBit(control, 8, 'LEDs', 'blinking', 'normal operation')
PrintBit(control, 9, 'AD9512', 'in reset', 'running')
###################################################################
## Test functions
###################################################################
def Init():
WbWrite('control', 0)
SpiInit()
Ad9512Init()
SetTriggerThreshold(0.5)
SelectClock(0)
SetVcxoFrequency(-0.2105) # 125.0000 MHz
ClearMemory(0, '*')
def TestPulse(channel = 1):
# configure channel
WbWrite('overflow', 17820)
WbWrite('trig_latency', 10)
CreatePulse(channel, 5, 105)
# CreatePulse(channel, 5, 10)
# CreatePulse(channel, 25, 30)
# CreatePulse(channel, 125, 130)
WbWrite('ch'+str(channel)+'_delay_set', 100)
WbWrite('ch'+str(channel)+'_delay_res', 200)
# start channel
channel -= 1
channel %= 2
WbSetBits('control', 0x4<<channel, 0x4<<channel) # set output enable
channel *= 2
WbSetBits('control', 0x30<<channel, 0x10<<channel) # set mode CONT.
Init()
Control()
Status()
TestPulse(1)
TestPulse(2)
Control()
Status()
\ No newline at end of file
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