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Marek Gumiński authored
Modified HDL so that PLL connectec to CLK2 may be reset. Test03 should work reliably. Added some diagnostics and error handling in acq.sh.
ad87833c
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ip_cores | ||
rtl | ||
syn | ||
testbench | ||
top | ||
spec-fmc-adc-v4.0.bin | ||
spec-init.bin-2012-12-14 | ||
sw2bit.sh |