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fmc dac 600m 12b 1cha dds - Testing
Commit 73707621 authored by Mariusz Mroz's avatar Mariusz Mroz
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Tests and documentation improvement

parent 0f8328d6
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Showing with 126 additions and 41 deletions
fmcdac600m12b1chadds.sh
View file @ 73707621
......@@ -74,8 +74,8 @@ do
echo "Test series run $nb_test out of $nb_test_limit"
echo " "
# sudo ./ptsDacDDS.py -b FmcDac600m12b1chaDds -s $serial -e $extra_serial -t./test/fmcdac600m12b1chadds/python -l $LOGDIR 00 01 02 03 04 05 06 07
sudo ./ptsDacDDS.py -b FmcDac600m12b1chaDds -s $serial -e $extra_serial -t./test/fmcdac600m12b1chadds/python -l $LOGDIR 00 01 02 03 04 05 06 07
# sudo ./ptsDacDDS.py -b FmcDac600m12b1chaDds -s $serial -e $extra_serial -t./test/fmcdac600m12b1chadds/python -l $LOGDIR 00 01 03 04 05 06 07
if [ "$nb_test" != "$nb_test_limit" ]
......
python/test00.py
View file @ 73707621
......@@ -39,7 +39,7 @@ test00:
UIDEL = 1;
FIRMWARE_PATH = '/../gateware/syn/spec_top.bin'
INPUT_TIMEOUT = 20;
INPUT_TIMEOUT = 30;
AUTOMATION = True
def test_sdbid(dut):
......
python/test01.py
View file @ 73707621
......@@ -45,7 +45,7 @@ AUTOMATION = True
OSC_TUNNING_THD = 1e-6
FIRMWARE_PATH = '/../gateware/syn/spec_top.bin'
INPUT_TIMEOUT = 5;
INPUT_TIMEOUT = 30;
# make sure that this function is called after AD9516 init
def measure_clk1(carrier):
......
python/test02.py
View file @ 73707621
......@@ -106,6 +106,17 @@ dacinst = dac(carrier);
n_samples = 16384
gen_figs = False
# kind of signal to noise ratio error counter
# errors_snr = [ 0 for i in range(14) ]
# bit power ratio error counter
errors_bpr = [ 0 for i in range(14) ];
MAXATTEMPTS = 2;
RETRYDELAY = 5;
# warnings.simplefilter('ignore')
# Function below measures spectra of signal in channel 0
def measure_spectrum(bit_amp,urange,f, logname):
......@@ -146,65 +157,122 @@ def measure_spectrum(bit_amp,urange,f, logname):
return w/n_repeat
def print_figs( w_bkgr, w_sig_bk, w_sig ):
plot(w_bkgr)
title("background: bit value=%d frequency=%g" % (i, fm))
grid()
savefig("spectrum_bg_u%i_f_%g.png" % (i, fm))
show()
clf()
plot(w_sig_bk)
title("s+b: bit value=%d frequency=%g" % (i, fm))
grid()
savefig("spectrum_with_bg_u%i_f_%g.png" % (i, fm))
show()
clf()
plot(w_sig)
title("s+b-b: bit value=%d frequency=%g" % (i, fm))
grid()
savefig("spectrum_with_rmvd_bg_u%d_f_%g.png" % (i, fm))
show()
clf()
def verify_power_ratio( b, s_pow, m_pow ):
if s_pow/m_pow < 0:
# raise PtsError("DAC: bit nr %d does not generate output signal, P/Pt=%g", (b, s_pow/m_pow))
# print "DAC: bit nr %d does not generate output signal, P/Pt=%g" % (b, s_pow/m_pow)
print "DAC: bit nr %d measurement failed P/Pt=%g" % (b, s_pow/m_pow);
return False;
else:
return True;
def verify_bit_power_ratio( b, s_pow, old_s_pow ):
global errors_bpr
r_pow = s_pow / old_s_pow
if (r_pow < 2) or (r_pow > 8):
if errors_bpr[b] < MAXATTEMPTS:
errors_bpr[b] += 1;
print >> __stdout__, "Bit test failed, but will be retried in %d seconds. Make sure that test probe is connected correctly" % (RETRYDELAY)
print "Bit test failed, but will be retried."
time.sleep(RETRYDELAY);
print >> __stdout__, "Retrying"
return False;
else:
# raise PtsError("DAC: incorrect increase of power when switching from bit nr %d to bit nr %d : %g (expected between 2 and 8). Took %d attmempts." % (b-1, b, r_pow, MAXATTEMPTS))
print "DAC: incorrect increase of power when switching from bit nr %d to bit nr %d : %g (expected between 2 and 8)" % (b-1, b, r_pow)
print >> __stdout__, "DAC: incorrect increase of power when switching from bit nr %d to bit nr %d : %g (expected between 2 and 8)" % (b-1, b, r_pow)
return True;
else:
return True;
def test_proc(fm, logname ):
results=[]
results = [ [0,0,0] for i in range(14) ]
# Iterate over possible bit values
b = 0
old_s_pow = 1
# old_s_pow = 1
while b <= 13:
retry = False;
print "Testing bit %d" % b
print >> __stdout__, "Testing bit %d" % b
i = 1 << b
#Select the voltage range appropriately
if i < 512:
urange = "1"
else:
urange = "10"
#Measure the spectrum of the background noise
w_bkgr=measure_spectrum(0, urange,fm, logname)
w_sig_bk=measure_spectrum(i, urange,fm, logname)
w_sig=w_sig_bk-w_bkgr
if gen_figs:
plot(w_bkgr)
title("background: bit value=%d frequency=%g" % (i, fm))
grid()
savefig("spectrum_bg_u%i_f_%g.png" % (i, fm))
show()
clf()
plot(w_sig_bk)
title("s+b: bit value=%d frequency=%g" % (i, fm))
grid()
savefig("spectrum_with_bg_u%i_f_%g.png" % (i, fm))
show()
clf()
plot(w_sig)
title("s+b-b: bit value=%d frequency=%g" % (i, fm))
grid()
savefig("spectrum_with_rmvd_bg_u%d_f_%g.png" % (i, fm))
show()
clf()
print_figs( w_bkgr, w_sig_bk, w_sig );
#Expected position of the signal
n_pos=int((n_samples*fm)/100e6+1.5)
#Mean power (with noise!)
m_pow=sum(w_sig_bk)/n_samples
#Power of the signal per bin
s_pow=sum(w_sig[(n_pos-2):(n_pos+3)])/5
#Check if the signal is visible
if s_pow/m_pow < 5:
raise PtsError("DAC: bit nr %d does not generate output signal, P/Pt=%g", (b, s_pow/m_pow))
# print "DAC: bit nr %d does not generate output signal, P/Pt=%g" % (b, s_pow/m_pow)
retry = not verify_power_ratio( b, s_pow, m_pow );
#If this is not bit number 0, check if power increased ba ca.4 (in fact between 2 and 8)
#comparing to the signal generated by the previous bit
if b > 0:
r_pow = s_pow / old_s_pow
if (r_pow < 2) or (r_pow > 8):
raise PtsError("DAC: incorrect increase of power when switching from bit nr %d to bit nr %d : %g (expected between 2 and 8)" % (b-1, b, r_pow))
# print "DAC: incorrect increase of power when switching from bit nr %d to bit nr %d : %g (expected between 2 and 8)" % (b-1, b, r_pow)
old_s_pow = s_pow
results.append([i,s_pow, m_pow])
# Go to the next bit
b += 1
# errror = not verify_bit_power_ratio( s_pow, old_s_pow );
retry = not verify_bit_power_ratio( b, s_pow, results[b-1][1] );
# choose next bit
if not retry :
# old_s_pow = s_pow
results[b] = [ i, s_pow, m_pow ];
# Go to the next bit
b += 1;
elif retry and b > 0:
b -= 1;
#Now check if the result is reasonable
#Signal should be visible
return results
......@@ -213,11 +281,14 @@ def main (card=None, logname=None, default_directory='.',suite=None):
#Test frequencies
f=[10.512e6,12.121e6]
#Enforce generation of graphic files
global gen_figs
global errors_bpr
gen_figs = False
# print >> __stdout__, "Connect direct DAC output to ADC input 0 and confirm with enter key"
# raw_input("")
print >> __stdout__, "Please connect test probe to resistor R15 or R16 and confirm with ENTER button"
raw_input("")
......@@ -225,19 +296,33 @@ def main (card=None, logname=None, default_directory='.',suite=None):
# os.system( default_directory + "log_fmcdac600m")
logname = '../../../log_fmcdac600m12b1chadds/tmp'
test_fail = False;
failed = []
for fm in f:
# print "Frequency=%g" % fm
print >> __stdout__, "Frequency=%g" % fm
errors_bpr = [ 0 for i in range(14) ];
res=test_proc(fm, logname)
for i in range(0,len(res)):
if errors_bpr[i] == MAXATTEMPTS :
test_fail = True;
failed.append(i);
r=res[i]
if i==0:
print "bit=%d P=%g P/Pt=%g" % (r[0], r[1], r[1]/r[2])
print "bit=%d P=%g P/Pt=%g errors=%g" % (r[0], r[1], r[1]/r[2], errors_bpr[i])
else:
print "bit=%d P=%g P/Pt=%g ratio=%g" % (r[0], r[1], r[1]/r[2], r[1]/res[i-1][1])
print "bit=%d P=%g P/Pt=%g ratio=%g errors=%g" % (r[0], r[1], r[1]/r[2], r[1]/res[i-1][1], errors_bpr[i])
print "DAC test succeeded"
if test_fail == True:
raise PtsError("Some bits %s tests have failed." % failed )
else:
print "DAC test succeeded"
print >> __stdout__, "Test finished, you may remove test probe."
return 0
if __name__ == '__main__' :
......
python/test03.py
View file @ 73707621
......@@ -48,7 +48,7 @@ test03:
FIRMWARE_PATH = '/../gateware/syn/spec_top.bin'
AUTOMATION = True
TEST_RAW_DAC = True
TEST_RAW_DAC = False
def spi_test(dut):
......
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