Commit 880694f3 authored by Matthieu Cattin's avatar Matthieu Cattin

First draft of functional specifications.

parent 2b6ca54f
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\documentclass[11pt,a4paper]{article}
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% Uncomment the following two lines to check syntax only (no .dvi output produced, so it's faster!)
%\usepackage{syntonly}
%\syntaxonly
%\pagestyle{headings}
% Define the title
\title{FMC3 Functional Specification}
\author{Matthieu Cattin}
\begin{document}
%.jpg can only be seen in pdf file (not in dvi)!
\begin{figure}[t]
\includegraphics[scale=0.5]{cern_logo.pdf}
\label{fig:cern_logo}
\end{figure}
%Generate the title
\maketitle
% Insert a table of content
%\tableofcontents
\begin{abstract}
FMC3 is a 4-channel 16-bit 10Ms/s DAC card in FMC (FPGA Mezzanine Card~\cite{fmcstd}) form-factor.
This document describes the hardware only. Another functional specification is dedicated to the HDL related to the FMC3 card (see \textit{FMC3 HDL functional specification}).
\end{abstract}
\newpage
\begin{comment}
\textcolor{red}{
\section{Background}
In the context of the PS complex renovation project (ACCOR~\cite{accorweb}), it has been decided to design new boards in FMC form-factor.
The current slow waveform generator (GFAS, CVORB) is only 250kS/s and does not cover new needs in the mid-range of sampling frequencies. So, to avoid installing fast waveform generators for those cases, it has been decided to design a faster "slow" waveform generator.
Previous slow waveform generators (GFAS and CVORB) have digital serial outputs only, so an additional card in 3U format including a DAC is needed in that case.
}
\end{comment}
\section{Features}
\begin{itemize}
\item 4 single-ended analog output channels
\item Output voltage range : +/-10V (50 ohms)
\item 16-bit DACs
\item Up to 10MS/s
\item 1 external clock input (single-ended)
\item 1 start input (TTL)
\item 1 pause input (TTL)
\item 1 abort input (TTL)
\item Each channel can store up to 32 waveform.
\item Memory/channel is determined by FMC carrier.
\item Analog outputs auto-calibration.
\item $I^2C$ EEPROM to store IPMI information and DACs calibration factors
\item 2 modes (vectors and points)
\end{itemize}
\section{General description}
An FMC3 is a mezzanine card in FMC format, containing four identical analog output channels. Each channel has a 10MS/s 16-bit DAC with an output range of +/-10V. In addition, the card has three trigger inputs (start, pause and abort) and one external clock input. Those inputs are common to the four analog channels.
\begin{comment}
\textcolor{red}{
\subsection{Name}
Following LHC equipment code naming convention, the FMC3 card is named:
\textbf{CFCOC} (Controls and Communication, Front End, PC front end computer, I/O module)
}
\end{comment}
\section{Clock input}
The FMC3 card has an external clock input. It is compatible with many different electrical standards, like TTL, LVTTL, PECL, sine-wave, etc...
External clock input features:
\begin{itemize}
\item 50 ohms terminated
\item 100Hz to 10MHz
\item 0.6Vpp to 1Vpp (max. 10Vpp)
\end{itemize}
Nevertheless, the external clock input doesn't have to be used, as DACs clock can be provided by the FMC carrier card.
\section{Trigger inputs}
The FMC3 has 3 trigger inputs. A start, a pause and an abort input. They can be used in many different ways. For further information see the \textit{FMC3 HDL functional specification}.
All trigger inputs are TTL compliant with an internal 50 ohms termination.
Trigger inputs polarity is selectable via a register (TTL or $\overline{TTL}$).
\section{Analog outputs}
Table ~\ref{table:analogout} lists expected FMC3 analog outputs characteristics. Those are taken from an National Instruments PCI analog output card ~\cite{ni6731spec}.
\begin{table}[ht]%
\centering
\caption{Analog outputs characteristics}
\begin{tabular}{l l}
\hline
Range & $\pm$10V \\
\hline
INL\footnotemark[1] & $\pm$2.2 LSB max. \\
\hline
DNL\footnotemark[1] & $\pm$1.0 LSB max. \\
\hline
Monotonicity\footnotemark[1] & 16 bits \\
\hline
Offset error\footnotemark[1] & $\pm$168uV max \\
\hline
Gain error\footnotemark[1] & $\pm$30ppm of output max \\
\hline
Offset temperature coefficient & $\pm$35$\mu$V/$^{\circ}$C \\
\hline
Gain temperature coefficient & $\pm$6.5ppm/$^{\circ}$C \\
\hline
Onboard calibration reference & \\
Level & 5.000V \\
Temperature coefficient & $\pm$0.6ppm/$^{\circ}$C \\
Long-term stability & $\pm$15ppm/$\sqrt{1000h}$ \\
\hline
Slew rate & >15V/$\mu$ \\
\hline
Noise & 80$\mu$V, DC to 10MHz \\
\hline
Channel crosstalk & -95dB \\
\hline
Settling time & 25ns to $\pm$1 LSB accuracy \\
\hline
Total harmonic distortion & -90dB typ \\
& (generating a 10V, 1000 points, \\
& 7.5kHz sinewave, summing 9 harmonics) \\
\hline
\end{tabular}
\label{table:analogout}
\end{table}
\footnotetext[1]{Measured after calibration}
\section{Auto-calibration}
Analog output channels can be auto-calibrated via an on-board ADC. Calibration information is then stored in the on-board EEPROM.
\section{Physical description}
Figure ~\ref{fig:fmc_board_shape} shows the standard single width FMC board shape. The FMC3 card is connected to its carrier through a high-pin count connector from Samtec (see FMC standard~\cite{fmcstd} for further details), also visible in figure ~\ref{fig:fmc_board_shape}.
\begin{figure}[ht]
\centering
\includegraphics[scale=1]{fmc_board_shape.pdf}
\caption{FMC single width board shape (scale 1:1)}
\label{fig:fmc_board_shape}
\end{figure}
Due to the small amount of space on the front panel, it has been decided to use only one MDR\footnote{Mini Delta Ribbon (available from 3M, AMPHENOL, HARTING)} multi-pin connector on the FMC. This connector will carry all I/O signals to a 19 inches 1U patch panel. Several FMC3 can be connected to the same patch panel. The final number has to be decided. Timing inputs and analog outputs can be connected to the patch panel via SMA coaxial connectors. Next to each SMA connector, the indicate that a signal is present either at an input, or at an output.
In addition to the MDR connector, two LEDs are present on the FMC3. One is to indicate that the FPGA is correctly configured for FMC3 card. The second one is to indicate that the patch panel is correctly connected.
\bibliographystyle{plain}
\bibliography{fmc3_references}
\end{document}
\documentclass[11pt,a4paper]{article}
\usepackage[utf8]{inputenc}
\usepackage[T1]{fontenc}
\usepackage{ae,aecompl}
\usepackage{parskip} % no paragraph indentation
\usepackage[pdftex]{color,graphicx}
\usepackage{hyperref}
\usepackage{verbatim}
% Uncomment the following two lines to check syntax only (no .dvi output produced, so it's faster!)
%\usepackage{syntonly}
%\syntaxonly
%\pagestyle{headings}
% Define the title
\title{FMC3 HDL Functional Specification}
\author{Matthieu Cattin}
\begin{document}
%.jpg can only be seen in pdf file (not in dvi)!
\begin{figure}[t]
\includegraphics[scale=0.5]{cern_logo.pdf}
\label{fig:cern_logo}
\end{figure}
%Generate the title
\maketitle
% Insert a table of content
%\tableofcontents
\begin{abstract}
FMC3 is a 4-channel 16-bit 10Ms/s DAC board in FMC (FPGA Mezzanine Card~\cite{fmcstd}) form-factor.
This document describes the HDL related to the FMC3 card. For more information on hardware related specification, see \textit{FMC3 functional specification}.
\end{abstract}
\newpage
\begin{comment}
\textcolor{red}{
\section{Background}
In the context of the PS complex renovation project (ACCOR~\cite{accorweb}), it has been decided to design new boards in FMC form-factor.
The current slow waveform generator (GFAS, CVORB) is only 250kS/s and does not cover new needs in the mid-range of sampling frequencies. So, to avoid installing fast waveform generators for those cases, it has been decided to design a faster "slow" waveform generator.
Previous slow waveform generators (GFAS and CVORB) have digital serial outputs only, so an additional card in 3U format including a DAC is needed in that case.
}
\end{comment}
\section{Features}
\begin{itemize}
\item 4 single-ended analog output channels
\item Output voltage range : +/-10V (50 ohms)
\item 16-bit DACs
\item Up to 10MS/s
\item 1 external clock input (single-ended)
\item 1 start input (TTL)
\item 1 pause input (TTL)
\item 1 abort input (TTL)
\item Each channel can store up to 32 waveform.
\item Memory/channel is determined by FMC carrier.
\item Analog outputs auto-calibration.
\item $I^2C$ EEPROM to store IPMI information and DACs calibration factors
\item 2 modes (vectors and points)
\end{itemize}
\section{General description}
An FMC3 is a mezzanine card in FMC format, containing four identical analog output channels. Each channel has a 10MS/s 16-bit DAC with an output range of +/-10V. In addition, the card has three trigger inputs (start, pause and abort) and one external clock input. Those inputs are common to the four analog channels.
\section{Modes}
\subsection{Vector mode}
The vector mode principle is working as follows; a waveform stored in memory contains only a set of vectors (intermediate values to be send to the DAC are computed on-board). A vector is made of 3 parts, one for the amplitude and two for the time :
\begin{itemize}
\item amplitude value (next amplitude to reach)
\item step size (number of sampling clock period for a step)
\item number of steps
\end{itemize}
The first 3 values of a waveform are different from the above vector type.
\begin{itemize}
\item total number of vectors
\item repeat number (0=infinite)
\item first amplitude value
\end{itemize}
Memory can store up to 32 different waveforms per channel. Each waveform will have a fixed maximum length depending on the FMC carrier card capacity. The carrier should provide enough memory for at least 8000 vectors per waveform.
Each channel has a register allowing users to select the waveform to be played on next start pulse.
One mask register per channel allow to selectively enable the 32 waveforms. If a waveform is selected but disabled in the mask, start trigger is ignored.
In vector mode, the sampling frequency is fixed (10MS/s). But it can also be selectable between a certain number of predefined values. This has to be decided with the higher software layer developers.
All digital values send to the DACs are computed inside the FMC carrier from the vectors in memory.
\subsection{Point mode}
In addition to the vector mode, a point mode can also be implemented. In this case, all values to be send to the DAC will be stored in memory.
A table describes a set of waveforms. Each waveform is defined by:
\begin{itemize}
\item An address pointer.
\item The waveform size.
\item A repetition number.
\item The next waveform to play (if any).
\end{itemize}
The maximum number of waveform is 20 (to be confirmed). Waveform can be chained using the "Next waveform to play" field.
In point mode, sampling clock can be internal or external. In case of an internal clock, the frequency can be selected over a wide range. It will depend on the
\section{Triggers}
The FMC3 has 3 trigger inputs. A start, a pause and an abort input. They can be used in many different ways.
The first and simplest case use only the start input. Selected waveform is generated when a start pulse arrives. Generation continues until the end of the waveform.
Then the abort input can be used to stop a waveform generation. This input is mainly used for safety reason. It allows to stop the waveform generation at the end of a accelerator cycle, to make sure that the next cycle waveform can start properly. Even if there was a problem during generation.
The third trigger input, pause, is used to suspend the waveform generation. After a pause pulse, a new start pulse is needed in order to continue waveform generation.
Moreover, in vector mode, it is possible to program an pause inside a waveform. This is done by means of a special vector called "internal pause". To continue the waveform generation a start pulse is needed, as for the pause trigger input.
For test purpose, all the trigger inputs are also emulated in software by writing in a register.
Trigger inputs polarity is selectable via a register (TTL or $\overline{TTL}$).
\section{Test}
Some test features will be implemented to easily test hardware during development and installation.
The two test features are:
\begin{itemize}
\item test waveform generation (saw-tooth, triangle, sin?)
\item direct digital value to DAC
\end{itemize}
\bibliographystyle{plain}
\bibliography{fmc3_references}
\end{document}
@MISC{fmcstd,
author = "ANSI/VITA",
title = "American National Standard for FPGA Mezzanine Card (FMC) Standard ANSI/VITA 57.1-2008",
year = 2008
}
@MISC{accorweb,
author = "CERN",
title = "ACCOR - Accelerator Control System Renovation Project",
note = "\href{http://wikis.cern.ch/display/ACCOR/Home}{ACCOR website}",
year = 2009
}
@MISC{ni6731spec,
author = "National Instruments",
title = "\href{http://www.ni.com/pdf/manuals/371232b.pdf}{NI 6731/6733 Specifications}",
year = 2007
}
\ No newline at end of file
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