Commit a21561f9 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski

fixed bugs found during the review, PCB layout ready

parent 6e8ceb7e
......@@ -25,13 +25,13 @@ PowerPortNamesTakePriority=0
PushECOToAnnotationFile=1
[Document1]
DocumentPath=fmc_carrier_tester.SchDoc
DocumentPath=Schematics\fmc_connector.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=0
AnnotateOrder=1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
......@@ -39,13 +39,13 @@ ClassGenCCAutoRoomEnabled=0
ClassGenNCAutoScope=None
[Document2]
DocumentPath=fmc_connector.SchDoc
DocumentPath=Schematics\fmc_carrier_tester.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=1
AnnotateOrder=0
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
......@@ -53,21 +53,7 @@ ClassGenCCAutoRoomEnabled=0
ClassGenNCAutoScope=None
[Document3]
DocumentPath=fmc_carrier_tester.pcbdoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None
[Document4]
DocumentPath=fmc_carrier_tester.OutJob
DocumentPath=PCB-Layout\fmc_carrier_tester.pcbdoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -83,9 +69,6 @@ ClassGenNCAutoScope=None
[GeneratedDocument1]
DocumentPath=Project Outputs for fmc_carrier_tester\Design Rule Check - fmc_carrier_tester.html
[GeneratedDocument2]
DocumentPath=..\fmc-delay-1ns-8cha\trunk\circuit_board\fmc-delay-1ns-8cha\Schematics\FMC_Delay_1ns_4Cha.PcbDoc.htm
[Generic_SmartPDF]
AutoOpenFile=-1
AutoOpenOutJob=-1
......
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