Project description
FmcAdc100M14b4chb is a 4 channel 100MSPS 14 bit ADC card in FMC (FPGA Mezzanine Card) standard. Gain can be set by software in three steps: /-50mV,/-0.5V, /-5V. Offset correction is added in front of the ADC board, therefore voltage shift in the range of/- 5V is independent on the chosen gain range.
Specification
Parameter | Value |
max. sample rate | 105 MSPS |
bits/sample | 14 bit |
channels | 4 |
analog bandwidth | 25 MHz |
input impedance | 1kOhm / 50 Ohm - software selectable |
gain steps | /-50mV,/-0.5V, +/-5V for full scale |
offset correction range | +/- 5V for every gain range |
max. gain error | +/- 1% |
FMC to carrier interface | FMC high pin count connector |
ADC interface | Serial LVDS, 2 pairs for each channel |
Project documents
Full schematic - PDF file: www.ohwr.org/35
List of components - Excel file: link
Status
Date | Event |
23-11-2009 | Selection of components, waiting for schematic symbols |
2-12-2009 | Work on the FmcAdc100M14b4ch_a is suppressed, because estimated performance couldn't pass the expectations |
18-12-2009 | Specification and schematic of new version has been added |
22-01-2010 | FmcAdc100M14b4cha upgrade. Design revised and modified, better parameters expected. |
10-02-2010 | New design made with 3 input ranges and programmable offset. Need to finalise local clock circuit before PCB layout can start. |
Documents related to previous version
Second version of FmcAdc board*
Functional specification : link
Technical specification: link
Schematic (PDF format): link
First version of FmcAdc board*
Functional specification : link
Technical specification : link
Schematic (PDF format): link
Analogue Anarchist's schematic review: link
-- ErikVanDerBij - 24 Nov 2009