FMC ADC 100M 14B 4CHA Gateware Support
Overview
This project provides gateware support for the fmc-adc-100m14b4cha project.
[Overview of the gateware architecture on the SPEC carrier.]
Supported carriers:
- SPEC, 1 slot PCIe FMC carrier (gateware architecture diagram).
- SVEC, 2 slots VME64x FMC carrier (gateware architecture diagram).
FPGA resource utilization metrics are offered for each supported carrier board separately.
Git sub-modules:
- ddr3-sp6-core: hdl/ip_cores/ddr3-sp6-core
- general-cores: hdl/ip_cores/general-cores
- gn4124-core: hdl/ip_cores/gn4124-core
- vme64x-core: hdl/ip_cores/vme64x-core
Folder structure:
- ADC core sources: hdl/adc/
- required hdl cores: hdl/ip_cores/
- SPEC carrier reference design: hdl/spec/
- SVEC carrier reference design: hdl/svec/
- gateware documentation: doc/
Releases
The reference design gateware for the supported carriers are listed on the Releases page.
Documentation
The main source of information is the gateware manual. It is available in the Documents section.
The specification used as a basis for the gateware implementation can
also be found in the Documents section.
But be aware that the final implementation isn't fully compliant to this
document.
- Gateware specification (pdf)
Specifications and roadmap for adding WR support to fmc-adc-100m14b4cha-gw are also available.