1. 05 Apr, 2022 2 commits
  2. 04 Apr, 2022 2 commits
  3. 31 Mar, 2022 1 commit
  4. 30 Mar, 2022 1 commit
  5. 14 Jan, 2022 3 commits
  6. 13 Jan, 2022 1 commit
  7. 11 Jan, 2022 6 commits
  8. 26 Oct, 2021 1 commit
    • Federico Vaga's avatar
      sw:drv: fix SVEC completion order · 60f24202
      Federico Vaga authored
      On SVEC carriers we do need to handle shots one by one to be able to
      reconfigure the VME DMA window. To handle it we make use of the
      completion mechanism: we transfer a shot and we wait its completion,
      and then we do the next one.  The completion goes toghether with the
      ZIO block, therefore the completion variable is stored togheter with
      the block. However, in the fa_dma_complete() code we were cleaning up
      the block too soon, so the completion variable is unusable.
      
      Anticipating the completion fixes the problem.
      Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
      60f24202
  9. 10 Sep, 2021 4 commits
    • Federico Vaga's avatar
      Merge tag 'v6.0.0' into develop · 5a3d7f60
      Federico Vaga authored
      6.0.0 - 2021-09-10
      ==================
      Added
      -----
      - hdl: configurable auto byte swap in hardware, useful for SVEC to reduce software complexity
      - hdl,sw: DMA data is always little-endian
      - sw: software version validation against FPGA version
      - bld: flawfinder check on software tools
      
      Changed
      -------
      - sw: offsets are not anymore in uV but they are just raw values
      
      Fixed
      -----
      - sw: security fixes detected by flawfinder
      - sw: fixes detected by checkpatch.pl
      - sw: style fixes detected by checkpatch.pl
      - sw: improve compatibility with newer ( > 3.10) Linux kernel versions
      5a3d7f60
    • Federico Vaga's avatar
      Merge branch 'release/v6.0.0' · 6923e613
      Federico Vaga authored
      6923e613
    • Federico Vaga's avatar
      update changelog · 0b8af12f
      Federico Vaga authored
      Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
      0b8af12f
    • Federico Vaga's avatar
      Revert "sw:drv: get time to the FPGA to stabilize" · 0ec841d7
      Federico Vaga authored
      This reverts commit e2d435fb.
      
      Apparently the temperature issue has nothing to do with the signal
      stabilization in FPGA
      0ec841d7
  10. 08 Sep, 2021 2 commits
  11. 07 Sep, 2021 3 commits
    • Federico Vaga's avatar
      Merge tag 'v6.0.0.rc1' into develop · da1b60c2
      Federico Vaga authored
      6.0.0 - 2021-09-07
      ==================
      Added
      -----
      - hdl: configurable auto byte swap in hardware, useful for SVEC to reduce software complexity
      - hdl,sw: DMA data is always little-endian
      - sw: software version validation against FPGA version
      - bld: flawfinder check on software tools
      
      Changed
      -------
      - sw: offsets are not anymore in uV but they are just raw values
      
      Fixed
      -----
      - sw: security fixes detected by flawfinder
      - sw: fixes detected by checkpatch.pl
      - sw: style fixes detected by checkpatch.pl
      - sw: improve compatibility with newer ( > 3.10) Linux kernel versions
      da1b60c2
    • Federico Vaga's avatar
      Merge branch 'release/v6.0.0.rc1' · 05bbebf8
      Federico Vaga authored
      05bbebf8
    • Federico Vaga's avatar
      update changelog · 8ce74dac
      Federico Vaga authored
      Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
      8ce74dac
  12. 06 Sep, 2021 2 commits
  13. 03 Sep, 2021 1 commit
  14. 31 Aug, 2021 11 commits