Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>

both SPEC and SVEC designs easily meet timing now.
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>

[hdl] manually drive cheby-generated WB read data to 'X' for non-defined addresses. This helps with meeting timing because of smaller and simpler multiplexer logic.

Fixes https://www.ohwr.org/project/fmc-adc-100m14b4cha/issues/3.

Re-aligment was performed using the WR-enabled FMC-ADC and the PPS signal coming out from the WR
switch as signal input on channel #1, as well as external trigger input. The PPS signal was
delivered to the FMC-ADC by means of a 40ns coaxial cable.

External, internal and time triggering well all tested and calibrated using the above setup.