Merge branch 'release/v5.0.0.rc7' into master
Showing
with
56476 additions
and
128940 deletions
+56476
-128940
- .gitignore .gitignore +33 -1
- .gitmodules .gitmodules +13 -4
- GPL-2.0-or-later.txt LICENSES/GPL-2.0-or-later.txt +339 -0
- GPL-3.0-or-later.txt LICENSES/GPL-3.0-or-later.txt +674 -0
- Manifest.py Manifest.py +6 -0
- .gitignore distribution/.gitignore +1 -0
- Makefile distribution/Makefile +45 -0
- dkms.conf distribution/dkms.conf +8 -0
- fmc-adc-100m14b4ch-dkms-mkrpm.spec distribution/fmc-adc-100m14b4ch-dkms-mkrpm.spec +84 -0
- .gitignore doc/.gitignore +18 -0
- Makefile doc/Makefile +20 -0
- conf.py doc/conf.py +195 -0
- config-if.gif doc/img/config-if.gif +0 -0
- config-if.pdf doc/img/config-if.pdf +0 -0
- config-if.txt doc/img/config-if.txt +1 -0
- fmc-adc-call.graphml doc/img/fmc-adc-call.graphml +2416 -0
- fmc-adc-call.pdf doc/img/fmc-adc-call.pdf +30270 -0
- fmc-adc-fsm.graphml doc/img/fmc-adc-fsm.graphml +535 -0
- fmc-adc-fsm.pdf doc/img/fmc-adc-fsm.pdf +6908 -0
- fmc-adc-hierarchy.graphml doc/img/fmc-adc-hierarchy.graphml +239 -0
- fmc-adc-hierarchy.pdf doc/img/fmc-adc-hierarchy.pdf +1951 -0
- interleaved.graphml doc/img/interleaved.graphml +219 -0
- interleaved.pdf doc/img/interleaved.pdf +1702 -0
- library.graphml doc/img/library.graphml +221 -0
- library.pdf doc/img/library.pdf +1896 -0
- index.rst doc/index.rst +27 -0
- fmc_adc_100Ms_csr.tex doc/manual/fmc_adc_100Ms_csr.tex +366 -81
- fmcadc100m14b4cha_gateware_manual.in doc/manual/fmcadc100m14b4cha_gateware_manual.in +8 -1
- carrier_csr.tex doc/manual/spec/carrier_csr.tex +3 -3
- carrier_csr.tex doc/manual/svec/carrier_csr.tex +6 -6
- timetag_core_regs.tex doc/manual/timetag_core_regs.tex +115 -134
- driver.rst doc/software/driver.rst +581 -0
- index.rst doc/software/index.rst +14 -0
- tools.rst doc/software/tools.rst +169 -0
- fmcadc_fw_testing.txt doc/specs/fmcadc_fw_testing.txt +0 -0
- LICENSE.txt hdl/LICENSE.txt +0 -458
- Manifest.py hdl/adc/rtl/Manifest.py +0 -9
- fmc_adc_100Ms_core.vhd hdl/adc/rtl/fmc_adc_100Ms_core.vhd +0 -1618
- fmc_adc_100Ms_core_pkg.vhd hdl/adc/rtl/fmc_adc_100Ms_core_pkg.vhd +0 -123
- fmc_adc_100Ms_csr.vhd hdl/adc/rtl/fmc_adc_100Ms_csr.vhd +0 -1534
- fmc_adc_eic.vhd hdl/adc/rtl/fmc_adc_eic.vhd +0 -321
- fmc_adc_mezzanine.vhd hdl/adc/rtl/fmc_adc_mezzanine.vhd +0 -633
- fmc_adc_mezzanine_pkg.vhd hdl/adc/rtl/fmc_adc_mezzanine_pkg.vhd +0 -138
- offset_gain.vhd hdl/adc/rtl/offset_gain.vhd +0 -158
- offset_gain_s.vhd hdl/adc/rtl/offset_gain_s.vhd +0 -183
- offset_gain_s_tb.vhd hdl/adc/rtl/offset_gain_s_tb.vhd +0 -283
- offset_gain_tb.vhd hdl/adc/rtl/offset_gain_tb.vhd +0 -207
- var_sat_s.vhd hdl/adc/rtl/var_sat_s.vhd +0 -112
- fmc-adc.pins hdl/adc/ucf_gen/fmc-adc.pins +0 -77
- Makefile hdl/adc/wb_gen/Makefile +0 -11
- fmc_adc_100Ms_csr.h hdl/adc/wb_gen/fmc_adc_100Ms_csr.h +0 -386
- fmc_adc_100Ms_csr.htm hdl/adc/wb_gen/fmc_adc_100Ms_csr.htm +0 -11558
- fmc_adc_100Ms_csr.wb hdl/adc/wb_gen/fmc_adc_100Ms_csr.wb +0 -939
- fmc_adc_eic.h hdl/adc/wb_gen/fmc_adc_eic.h +0 -77
- fmc_adc_eic.htm hdl/adc/wb_gen/fmc_adc_eic.htm +0 -1465
- fmc_adc_eic.wb hdl/adc/wb_gen/fmc_adc_eic.wb +0 -21
- Makefile hdl/cheby/Makefile +16 -0
- fmc_adc_100Ms_channel_regs.cheby hdl/cheby/fmc_adc_100Ms_channel_regs.cheby +109 -0
- fmc_adc_100Ms_channel_regs.vhd hdl/cheby/fmc_adc_100Ms_channel_regs.vhd +237 -0
- fmc_adc_100Ms_csr.cheby hdl/cheby/fmc_adc_100Ms_csr.cheby +415 -0
- fmc_adc_100Ms_csr.vhd hdl/cheby/fmc_adc_100Ms_csr.vhd +682 -0
- fmc_adc_aux_trigin.cheby hdl/cheby/fmc_adc_aux_trigin.cheby +41 -0
- fmc_adc_aux_trigin.vhd hdl/cheby/fmc_adc_aux_trigin.vhd +238 -0
- fmc_adc_aux_trigout.cheby hdl/cheby/fmc_adc_aux_trigout.cheby +73 -0
- fmc_adc_aux_trigout.vhd hdl/cheby/fmc_adc_aux_trigout.vhd +237 -0
- fmc_adc_eic_regs.cheby hdl/cheby/fmc_adc_eic_regs.cheby +53 -0
- fmc_adc_eic_regs.vhd hdl/cheby/fmc_adc_eic_regs.vhd +191 -0
- fmc_adc_mezzanine_mmap.cheby hdl/cheby/fmc_adc_mezzanine_mmap.cheby +44 -0
- fmc_adc_mezzanine_mmap.vhd hdl/cheby/fmc_adc_mezzanine_mmap.vhd +394 -0
- spec_ref_fmc_adc_100Ms_mmap.cheby hdl/cheby/spec_ref_fmc_adc_100Ms_mmap.cheby +21 -0
- spec_ref_fmc_adc_100Ms_mmap.vhd hdl/cheby/spec_ref_fmc_adc_100Ms_mmap.vhd +190 -0
- svec_ref_fmc_adc_100Ms_mmap.cheby hdl/cheby/svec_ref_fmc_adc_100Ms_mmap.cheby +26 -0
- svec_ref_fmc_adc_100Ms_mmap.vhd hdl/cheby/svec_ref_fmc_adc_100Ms_mmap.vhd +233 -0
- timetag_core_regs.cheby hdl/cheby/timetag_core_regs.cheby +228 -0
- timetag_core_regs.vhd hdl/cheby/timetag_core_regs.vhd +370 -0
- adc_serdes.asy hdl/ip_cores/adc_serdes.asy +0 -45
- adc_serdes.ejp hdl/ip_cores/adc_serdes.ejp +0 -49
- adc_serdes.gise hdl/ip_cores/adc_serdes.gise +0 -31
- adc_serdes.ucf hdl/ip_cores/adc_serdes.ucf +0 -51
- adc_serdes.vhd hdl/ip_cores/adc_serdes.vhd +0 -255
- adc_serdes.vho hdl/ip_cores/adc_serdes.vho +0 -98
- adc_serdes.xco hdl/ip_cores/adc_serdes.xco +0 -77
- adc_serdes.xise hdl/ip_cores/adc_serdes.xise +0 -393
- selectio_wiz_ds746.pdf hdl/ip_cores/adc_serdes/doc/selectio_wiz_ds746.pdf +0 -0
- selectio_wiz_gsg700.pdf hdl/ip_cores/adc_serdes/doc/selectio_wiz_gsg700.pdf +0 -0
- adc_serdes_exdes.vhd hdl/ip_cores/adc_serdes/example_design/adc_serdes_exdes.vhd +0 -222
- implement.bat hdl/ip_cores/adc_serdes/implement/implement.bat +0 -44
- implement.sh hdl/ip_cores/adc_serdes/implement/implement.sh +0 -43
- synplify.prj hdl/ip_cores/adc_serdes/implement/synplify.prj +0 -1
- xst.prj hdl/ip_cores/adc_serdes/implement/xst.prj +0 -3
- xst.scr hdl/ip_cores/adc_serdes/implement/xst.scr +0 -10
- selectio_wiz_readme.txt hdl/ip_cores/adc_serdes/selectio_wiz_readme.txt +0 -143
- adc_serdes_tb.vhd hdl/ip_cores/adc_serdes/simulation/adc_serdes_tb.vhd +0 -191
- simcmds.tcl hdl/ip_cores/adc_serdes/simulation/functional/simcmds.tcl +0 -9
- simulate_isim.bat ..._cores/adc_serdes/simulation/functional/simulate_isim.bat +0 -58
- simulate_isim.sh ...p_cores/adc_serdes/simulation/functional/simulate_isim.sh +0 -58
- simulate_mti.do ...ip_cores/adc_serdes/simulation/functional/simulate_mti.do +0 -64
- simulate_ncsim.sh ..._cores/adc_serdes/simulation/functional/simulate_ncsim.sh +0 -61
- simulate_vcs.sh ...ip_cores/adc_serdes/simulation/functional/simulate_vcs.sh +0 -1
- ucli_commands.key ..._cores/adc_serdes/simulation/functional/ucli_commands.key +0 -1
- vcs_session.tcl ...ip_cores/adc_serdes/simulation/functional/vcs_session.tcl +0 -1
- wave.do hdl/ip_cores/adc_serdes/simulation/functional/wave.do +0 -92
- adc_serdes_flist.txt hdl/ip_cores/adc_serdes_flist.txt +0 -31
- adc_serdes_xmdf.tcl hdl/ip_cores/adc_serdes_xmdf.tcl +0 -148
- adc_sync_fifo.asy hdl/ip_cores/adc_sync_fifo.asy +0 -45
- adc_sync_fifo.gise hdl/ip_cores/adc_sync_fifo.gise +0 -33
- adc_sync_fifo.ngc hdl/ip_cores/adc_sync_fifo.ngc +0 -3
- adc_sync_fifo.sym hdl/ip_cores/adc_sync_fifo.sym +0 -39
- adc_sync_fifo.vhd hdl/ip_cores/adc_sync_fifo.vhd +0 -155
- adc_sync_fifo.vho hdl/ip_cores/adc_sync_fifo.vho +0 -74
- adc_sync_fifo.xco hdl/ip_cores/adc_sync_fifo.xco +0 -84
- adc_sync_fifo.xise hdl/ip_cores/adc_sync_fifo.xise +0 -392
- adc_sync_fifo_flist.txt hdl/ip_cores/adc_sync_fifo_flist.txt +0 -14
- adc_sync_fifo_xmdf.tcl hdl/ip_cores/adc_sync_fifo_xmdf.tcl +0 -80
- coregen.cgc hdl/ip_cores/coregen.cgc +0 -588
- coregen.cgp hdl/ip_cores/coregen.cgp +0 -22
- coregen.log hdl/ip_cores/coregen.log +0 -59
- ddr3-sp6-core hdl/ip_cores/ddr3-sp6-core +1 -1
- ext_pulse_sync_rtl.vhd hdl/ip_cores/ext_pulse_sync/ext_pulse_sync_rtl.vhd +0 -191
- fifo_generator_readme.txt hdl/ip_cores/fifo_generator_readme.txt +0 -165
- fifo_generator_ug175.pdf hdl/ip_cores/fifo_generator_ug175.pdf +0 -0
- general-cores hdl/ip_cores/general-cores +1 -1
- gn4124-core hdl/ip_cores/gn4124-core +1 -1
- monostable_rtl.vhd hdl/ip_cores/monostable/monostable_rtl.vhd +0 -161
- monostable_tb.vhd hdl/ip_cores/monostable/monostable_tb.vhd +0 -122
- multishot_dpram.asy hdl/ip_cores/multishot_dpram.asy +0 -33
- multishot_dpram.gise hdl/ip_cores/multishot_dpram.gise +0 -33
- multishot_dpram.ngc hdl/ip_cores/multishot_dpram.ngc +0 -3
- multishot_dpram.sym hdl/ip_cores/multishot_dpram.sym +0 -30
- multishot_dpram.vhd hdl/ip_cores/multishot_dpram.vhd +0 -138
- multishot_dpram.vho hdl/ip_cores/multishot_dpram.vho +0 -68
- multishot_dpram.xco hdl/ip_cores/multishot_dpram.xco +0 -93
- multishot_dpram.xise hdl/ip_cores/multishot_dpram.xise +0 -392
- multishot_dpram_flist.txt hdl/ip_cores/multishot_dpram_flist.txt +0 -14
- multishot_dpram_xmdf.tcl hdl/ip_cores/multishot_dpram_xmdf.tcl +0 -80
- spec hdl/ip_cores/spec +1 -0
- svec hdl/ip_cores/svec +1 -0
- Manifest.py hdl/ip_cores/timetag_core/rtl/Manifest.py +0 -4
- timetag_core.vhd hdl/ip_cores/timetag_core/rtl/timetag_core.vhd +0 -309
- timetag_core_pkg.vhd hdl/ip_cores/timetag_core/rtl/timetag_core_pkg.vhd +0 -94
- timetag_core_regs.vhd hdl/ip_cores/timetag_core/rtl/timetag_core_regs.vhd +0 -267
- Makefile hdl/ip_cores/timetag_core/wb_gen/Makefile +0 -7
- timetag_core_regs.h hdl/ip_cores/timetag_core/wb_gen/timetag_core_regs.h +0 -109
- timetag_core_regs.htm hdl/ip_cores/timetag_core/wb_gen/timetag_core_regs.htm +0 -6008
- timetag_core_regs.wb hdl/ip_cores/timetag_core/wb_gen/timetag_core_regs.wb +0 -262
- utils_pkg.vhd hdl/ip_cores/utils/utils_pkg.vhd +0 -91
- vme64x-core hdl/ip_cores/vme64x-core +1 -1
- wb_ddr_fifo.asy hdl/ip_cores/wb_ddr_fifo.asy +0 -41
- wb_ddr_fifo.gise hdl/ip_cores/wb_ddr_fifo.gise +0 -33
- wb_ddr_fifo.ngc hdl/ip_cores/wb_ddr_fifo.ngc +0 -3
- wb_ddr_fifo.sym hdl/ip_cores/wb_ddr_fifo.sym +0 -36
- wb_ddr_fifo.vhd hdl/ip_cores/wb_ddr_fifo.vhd +0 -152
- wb_ddr_fifo.vho hdl/ip_cores/wb_ddr_fifo.vho +0 -72
- wb_ddr_fifo.xco hdl/ip_cores/wb_ddr_fifo.xco +0 -84
- wb_ddr_fifo.xise hdl/ip_cores/wb_ddr_fifo.xise +0 -392
- wb_ddr_fifo_flist.txt hdl/ip_cores/wb_ddr_fifo_flist.txt +0 -14
- wb_ddr_fifo_xmdf.tcl hdl/ip_cores/wb_ddr_fifo_xmdf.tcl +0 -80
- wb_sync_fifo.asy hdl/ip_cores/wb_sync_fifo.asy +0 -45
- wb_sync_fifo.gise hdl/ip_cores/wb_sync_fifo.gise +0 -33
- wb_sync_fifo.ngc hdl/ip_cores/wb_sync_fifo.ngc +0 -3
- wb_sync_fifo.sym hdl/ip_cores/wb_sync_fifo.sym +0 -39
- wb_sync_fifo.vhd hdl/ip_cores/wb_sync_fifo.vhd +0 -155
- wb_sync_fifo.vho hdl/ip_cores/wb_sync_fifo.vho +0 -74
- wb_sync_fifo.xco hdl/ip_cores/wb_sync_fifo.xco +0 -84
- wb_sync_fifo.xise hdl/ip_cores/wb_sync_fifo.xise +0 -392
- wb_sync_fifo_flist.txt hdl/ip_cores/wb_sync_fifo_flist.txt +0 -14
- wb_sync_fifo_xmdf.tcl hdl/ip_cores/wb_sync_fifo_xmdf.tcl +0 -80
- wr-cores hdl/ip_cores/wr-cores +1 -0
- Manifest.py hdl/platform/Manifest.py +2 -0
- Manifest.py hdl/platform/xilinx/Manifest.py +5 -0
- Manifest.py hdl/platform/xilinx/spartan6/Manifest.py +3 -0
- ltc2174_2l16b_receiver.vhd hdl/platform/xilinx/spartan6/ltc2174_2l16b_receiver.vhd +413 -0
- Manifest.py hdl/rtl/Manifest.py +16 -0
- fmc_adc_100Ms_core.vhd hdl/rtl/fmc_adc_100Ms_core.vhd +1745 -0
- fmc_adc_100Ms_core_pkg.vhd hdl/rtl/fmc_adc_100Ms_core_pkg.vhd +127 -0
- fmc_adc_eic.vhd hdl/rtl/fmc_adc_eic.vhd +82 -0
- fmc_adc_mezzanine.vhd hdl/rtl/fmc_adc_mezzanine.vhd +504 -0
- fmc_adc_mezzanine_pkg.vhd hdl/rtl/fmc_adc_mezzanine_pkg.vhd +137 -0
- offset_gain_s.vhd hdl/rtl/offset_gain_s.vhd +180 -0
- timetag_core.vhd hdl/rtl/timetag_core.vhd +374 -0
- acq_to_ddr.cdc hdl/spec/chipscope/acq_to_ddr.cdc +0 -565
- acq_to_ddr.cpj hdl/spec/chipscope/acq_to_ddr.cpj +0 -2846
- datapath.cdc hdl/spec/chipscope/datapath.cdc +0 -202
- datapath_fsclk.cdc hdl/spec/chipscope/datapath_fsclk.cdc +0 -192
- datapath_gn4124.cdc hdl/spec/chipscope/datapath_gn4124.cdc +0 -162
- datapath_sysclk.cdc hdl/spec/chipscope/datapath_sysclk.cdc +0 -192
- datapath_wb_to_ddr.cdc hdl/spec/chipscope/datapath_wb_to_ddr.cdc +0 -192
- end_acq_irq_bug.cdc hdl/spec/chipscope/end_acq_irq_bug.cdc +0 -206
- gn4124_dma_wb_sdb_hang.cdc hdl/spec/chipscope/gn4124_dma_wb_sdb_hang.cdc +0 -268
- gn4124_local_bus_drv_dma_freeze.cdc hdl/spec/chipscope/gn4124_local_bus_drv_dma_freeze.cdc +0 -510
- gn4124_local_bus_sdb_hang.cdc hdl/spec/chipscope/gn4124_local_bus_sdb_hang.cdc +0 -541
- gn4124_local_bus_sdb_hang.cpj hdl/spec/chipscope/gn4124_local_bus_sdb_hang.cpj +0 -2722
- gn4124_sdb_hang.cdc hdl/spec/chipscope/gn4124_sdb_hang.cdc +0 -319
- int_trigger.cdc hdl/spec/chipscope/int_trigger.cdc +0 -138
- irq.cdc hdl/spec/chipscope/irq.cdc +0 -230
- onewire_debug.cdc hdl/spec/chipscope/onewire_debug.cdc +0 -242
- serdes_issue.cdc hdl/spec/chipscope/serdes_issue.cdc +0 -202
- serdes_issue.cpj hdl/spec/chipscope/serdes_issue.cpj +0 -1034
- memory_map.txt hdl/spec/memory_map.txt +0 -97
- Manifest.py hdl/spec/rtl/Manifest.py +0 -5
- carrier_csr.vhd hdl/spec/rtl/carrier_csr.vhd +0 -262
- dma_eic.vhd hdl/spec/rtl/dma_eic.vhd +0 -321
- sdb_meta_pkg.vhd hdl/spec/rtl/sdb_meta_pkg.vhd +0 -87
- spec_top_fmc_adc_100Ms.vhd hdl/spec/rtl/spec_top_fmc_adc_100Ms.vhd +0 -1092
- adc_serdes.mk hdl/spec/sim-old/mk/adc_serdes.mk +0 -1
- adc_sync_fifo.mk hdl/spec/sim-old/mk/adc_sync_fifo.mk +0 -1
- carrier_csr.mk hdl/spec/sim-old/mk/carrier_csr.mk +0 -1
- cmd_router.mk hdl/spec/sim-old/mk/cmd_router.mk +0 -1
- cmd_router1.mk hdl/spec/sim-old/mk/cmd_router1.mk +0 -1
- ddr3.mk hdl/spec/sim-old/mk/ddr3.mk +0 -1
- ddr3_ctrl.mk hdl/spec/sim-old/mk/ddr3_ctrl.mk +0 -1
- ddr_controller_bank3_64b.mk hdl/spec/sim-old/mk/ddr_controller_bank3_64b.mk +0 -1
- dma_controller.mk hdl/spec/sim-old/mk/dma_controller.mk +0 -1
- dma_controller_wb_slave.mk hdl/spec/sim-old/mk/dma_controller_wb_slave.mk +0 -1
- ext_pulse_sync_rtl.mk hdl/spec/sim-old/mk/ext_pulse_sync_rtl.mk +0 -1
- fifo_32x512.mk hdl/spec/sim-old/mk/fifo_32x512.mk +0 -1
- fifo_64x512.mk hdl/spec/sim-old/mk/fifo_64x512.mk +0 -1
- fmc_adc_100Ms_core.mk hdl/spec/sim-old/mk/fmc_adc_100Ms_core.mk +0 -1
- fmc_adc_100Ms_csr.mk hdl/spec/sim-old/mk/fmc_adc_100Ms_csr.mk +0 -1
- gn4124_core.mk hdl/spec/sim-old/mk/gn4124_core.mk +0 -1
- gn4124_core_pkg.mk hdl/spec/sim-old/mk/gn4124_core_pkg.mk +0 -1
- gn4124_core_pkg_s6.mk hdl/spec/sim-old/mk/gn4124_core_pkg_s6.mk +0 -1
- gn4124_core_s6.mk hdl/spec/sim-old/mk/gn4124_core_s6.mk +0 -1
- gn412x_bfm.mk hdl/spec/sim-old/mk/gn412x_bfm.mk +0 -1
- i2c_master_bit_ctrl.mk hdl/spec/sim-old/mk/i2c_master_bit_ctrl.mk +0 -1
- i2c_master_byte_ctrl.mk hdl/spec/sim-old/mk/i2c_master_byte_ctrl.mk +0 -1
- i2c_master_top.mk hdl/spec/sim-old/mk/i2c_master_top.mk +0 -1
- iodrp_controller.mk hdl/spec/sim-old/mk/iodrp_controller.mk +0 -1
- iodrp_mcb_controller.mk hdl/spec/sim-old/mk/iodrp_mcb_controller.mk +0 -1
- l2p_arbiter.mk hdl/spec/sim-old/mk/l2p_arbiter.mk +0 -1
- l2p_dma_master.mk hdl/spec/sim-old/mk/l2p_dma_master.mk +0 -1
- l2p_ser.mk hdl/spec/sim-old/mk/l2p_ser.mk +0 -1
- l2p_ser_s6.mk hdl/spec/sim-old/mk/l2p_ser_s6.mk +0 -1
- mcb_raw_wrapper.mk hdl/spec/sim-old/mk/mcb_raw_wrapper.mk +0 -1
- mcb_soft_calibration.mk hdl/spec/sim-old/mk/mcb_soft_calibration.mk +0 -1
- mcb_soft_calibration_top.mk hdl/spec/sim-old/mk/mcb_soft_calibration_top.mk +0 -1
- mem_model.mk hdl/spec/sim-old/mk/mem_model.mk +0 -1
- memc3_infrastructure.mk hdl/spec/sim-old/mk/memc3_infrastructure.mk +0 -1
- memc3_wrapper.mk hdl/spec/sim-old/mk/memc3_wrapper.mk +0 -1
- monostable_rtl.mk hdl/spec/sim-old/mk/monostable_rtl.mk +0 -1
- multishot_dpram.mk hdl/spec/sim-old/mk/multishot_dpram.mk +0 -1
- p2l_decode32.mk hdl/spec/sim-old/mk/p2l_decode32.mk +0 -1
- p2l_des.mk hdl/spec/sim-old/mk/p2l_des.mk +0 -1
- p2l_des_s6.mk hdl/spec/sim-old/mk/p2l_des_s6.mk +0 -1
- p2l_dma_master.mk hdl/spec/sim-old/mk/p2l_dma_master.mk +0 -1
- serdes_1_to_n_clk_pll_s2_diff.mk hdl/spec/sim-old/mk/serdes_1_to_n_clk_pll_s2_diff.mk +0 -1
- serdes_1_to_n_data_s2_se.mk hdl/spec/sim-old/mk/serdes_1_to_n_data_s2_se.mk +0 -1
- serdes_n_to_1_s2_diff.mk hdl/spec/sim-old/mk/serdes_n_to_1_s2_diff.mk +0 -1
- serdes_n_to_1_s2_se.mk hdl/spec/sim-old/mk/serdes_n_to_1_s2_se.mk +0 -1
- spec_top_fmc_adc_100Ms.mk hdl/spec/sim-old/mk/spec_top_fmc_adc_100Ms.mk +0 -1
- spi_clgen.mk hdl/spec/sim-old/mk/spi_clgen.mk +0 -1
- spi_defines.mk hdl/spec/sim-old/mk/spi_defines.mk +0 -1
- spi_shift.mk hdl/spec/sim-old/mk/spi_shift.mk +0 -1
- spi_top.mk hdl/spec/sim-old/mk/spi_top.mk +0 -1
- tb_spec.mk hdl/spec/sim-old/mk/tb_spec.mk +0 -1
- test_dpram.mk hdl/spec/sim-old/mk/test_dpram.mk +0 -1
- textutil.mk hdl/spec/sim-old/mk/textutil.mk +0 -1
- timescale.mk hdl/spec/sim-old/mk/timescale.mk +0 -1
- util.mk hdl/spec/sim-old/mk/util.mk +0 -1
- utils_pkg.mk hdl/spec/sim-old/mk/utils_pkg.mk +0 -1
- wb_ddr_fifo.mk hdl/spec/sim-old/mk/wb_ddr_fifo.mk +0 -1
- wbmaster32.mk hdl/spec/sim-old/mk/wbmaster32.mk +0 -1
- afifo36_internal.v hdl/spec/sim-old/unisims/afifo36_internal.v +0 -1790
- and2.v hdl/spec/sim-old/unisims/and2.v +0 -32
- and2b1.v hdl/spec/sim-old/unisims/and2b1.v +0 -37
- and2b2.v hdl/spec/sim-old/unisims/and2b2.v +0 -39
- and3.v hdl/spec/sim-old/unisims/and3.v +0 -33
- and3b1.v hdl/spec/sim-old/unisims/and3b1.v +0 -37
- and3b2.v hdl/spec/sim-old/unisims/and3b2.v +0 -39
- and3b3.v hdl/spec/sim-old/unisims/and3b3.v +0 -41
- and4.v hdl/spec/sim-old/unisims/and4.v +0 -33
- and4b1.v hdl/spec/sim-old/unisims/and4b1.v +0 -37
- and4b2.v hdl/spec/sim-old/unisims/and4b2.v +0 -39
- and4b3.v hdl/spec/sim-old/unisims/and4b3.v +0 -41
- and4b4.v hdl/spec/sim-old/unisims/and4b4.v +0 -43
- and5.v hdl/spec/sim-old/unisims/and5.v +0 -33
- and5b1.v hdl/spec/sim-old/unisims/and5b1.v +0 -37
- and5b2.v hdl/spec/sim-old/unisims/and5b2.v +0 -39
- and5b3.v hdl/spec/sim-old/unisims/and5b3.v +0 -41
- and5b4.v hdl/spec/sim-old/unisims/and5b4.v +0 -43
- and5b5.v hdl/spec/sim-old/unisims/and5b5.v +0 -45
- aramb36_internal.v hdl/spec/sim-old/unisims/aramb36_internal.v +0 -3247
- bscan_fpgacore.v hdl/spec/sim-old/unisims/bscan_fpgacore.v +0 -40
- bscan_spartan2.v hdl/spec/sim-old/unisims/bscan_spartan2.v +0 -40
- bscan_spartan3.v hdl/spec/sim-old/unisims/bscan_spartan3.v +0 -40
- bscan_spartan3a.v hdl/spec/sim-old/unisims/bscan_spartan3a.v +0 -72
- bscan_virtex.v hdl/spec/sim-old/unisims/bscan_virtex.v +0 -40
- bscan_virtex2.v hdl/spec/sim-old/unisims/bscan_virtex2.v +0 -40
- bscan_virtex4.v hdl/spec/sim-old/unisims/bscan_virtex4.v +0 -88
- bscan_virtex5.v hdl/spec/sim-old/unisims/bscan_virtex5.v +0 -90
- buf.v hdl/spec/sim-old/unisims/buf.v +0 -33
- bufcf.v hdl/spec/sim-old/unisims/bufcf.v +0 -33
- bufe.v hdl/spec/sim-old/unisims/bufe.v +0 -33
- bufg.v hdl/spec/sim-old/unisims/bufg.v +0 -33
- bufgce.v hdl/spec/sim-old/unisims/bufgce.v +0 -38
- bufgce_1.v hdl/spec/sim-old/unisims/bufgce_1.v +0 -38
- bufgctrl.v hdl/spec/sim-old/unisims/bufgctrl.v +0 -166
- bufgdll.v hdl/spec/sim-old/unisims/bufgdll.v +0 -42
- bufgmux.v hdl/spec/sim-old/unisims/bufgmux.v +0 -65
- bufgmux_1.v hdl/spec/sim-old/unisims/bufgmux_1.v +0 -65
- bufgmux_ctrl.v hdl/spec/sim-old/unisims/bufgmux_ctrl.v +0 -35
- bufgmux_virtex4.v hdl/spec/sim-old/unisims/bufgmux_virtex4.v +0 -35
- bufgp.v hdl/spec/sim-old/unisims/bufgp.v +0 -33
- bufio.v hdl/spec/sim-old/unisims/bufio.v +0 -32
- bufr.v hdl/spec/sim-old/unisims/bufr.v +0 -180
- buft.v hdl/spec/sim-old/unisims/buft.v +0 -33
- capture_fpgacore.v hdl/spec/sim-old/unisims/capture_fpgacore.v +0 -31
- capture_spartan2.v hdl/spec/sim-old/unisims/capture_spartan2.v +0 -32
- capture_spartan3.v hdl/spec/sim-old/unisims/capture_spartan3.v +0 -32
- capture_spartan3a.v hdl/spec/sim-old/unisims/capture_spartan3a.v +0 -28
- capture_virtex.v hdl/spec/sim-old/unisims/capture_virtex.v +0 -32
- capture_virtex2.v hdl/spec/sim-old/unisims/capture_virtex2.v +0 -32
- capture_virtex4.v hdl/spec/sim-old/unisims/capture_virtex4.v +0 -31
- capture_virtex5.v hdl/spec/sim-old/unisims/capture_virtex5.v +0 -35
- carry4.v hdl/spec/sim-old/unisims/carry4.v +0 -60
- cfglut5.v hdl/spec/sim-old/unisims/cfglut5.v +0 -56
- clkdll.v hdl/spec/sim-old/unisims/clkdll.v +0 -472
- clkdlle.v hdl/spec/sim-old/unisims/clkdlle.v +0 -499
- clkdllhf.v hdl/spec/sim-old/unisims/clkdllhf.v +0 -447
- config.v hdl/spec/sim-old/unisims/config.v +0 -26
- crc32.v hdl/spec/sim-old/unisims/crc32.v +0 -225
- crc64.v hdl/spec/sim-old/unisims/crc64.v +0 -300
- dcc_fpgacore.v hdl/spec/sim-old/unisims/dcc_fpgacore.v +0 -309
- dcireset.v hdl/spec/sim-old/unisims/dcireset.v +0 -48
- dcm.v hdl/spec/sim-old/unisims/dcm.v +0 -1505
- dcm_adv.v hdl/spec/sim-old/unisims/dcm_adv.v +0 -1698
- dcm_base.v hdl/spec/sim-old/unisims/dcm_base.v +0 -137
- dcm_ps.v hdl/spec/sim-old/unisims/dcm_ps.v +0 -140
- dcm_sp.v hdl/spec/sim-old/unisims/dcm_sp.v +0 -1253
- dna_port.v hdl/spec/sim-old/unisims/dna_port.v +0 -74
- dsp48.v hdl/spec/sim-old/unisims/dsp48.v +0 -1018
- dsp48a.v hdl/spec/sim-old/unisims/dsp48a.v +0 -1350
- dsp48e.v hdl/spec/sim-old/unisims/dsp48e.v +0 -2888
- emac.v hdl/spec/sim-old/unisims/emac.v +0 -658
- fd.v hdl/spec/sim-old/unisims/fd.v +0 -59
- fd_1.v hdl/spec/sim-old/unisims/fd_1.v +0 -56
- fdc.v hdl/spec/sim-old/unisims/fdc.v +0 -61
- fdc_1.v hdl/spec/sim-old/unisims/fdc_1.v +0 -61
- fdce.v hdl/spec/sim-old/unisims/fdce.v +0 -63
- fdce_1.v hdl/spec/sim-old/unisims/fdce_1.v +0 -64
- fdcp.v hdl/spec/sim-old/unisims/fdcp.v +0 -65
- fdcp_1.v hdl/spec/sim-old/unisims/fdcp_1.v +0 -65
- fdcpe.v hdl/spec/sim-old/unisims/fdcpe.v +0 -65
- fdcpe_1.v hdl/spec/sim-old/unisims/fdcpe_1.v +0 -65
- fddrcpe.v hdl/spec/sim-old/unisims/fddrcpe.v +0 -114
- fddrrse.v hdl/spec/sim-old/unisims/fddrrse.v +0 -120
- fde.v hdl/spec/sim-old/unisims/fde.v +0 -58
- fde_1.v hdl/spec/sim-old/unisims/fde_1.v +0 -60
- fdp.v hdl/spec/sim-old/unisims/fdp.v +0 -61
- fdp_1.v hdl/spec/sim-old/unisims/fdp_1.v +0 -64
- fdpe.v hdl/spec/sim-old/unisims/fdpe.v +0 -64
- fdpe_1.v hdl/spec/sim-old/unisims/fdpe_1.v +0 -63
- fdr.v hdl/spec/sim-old/unisims/fdr.v +0 -62
- fdr_1.v hdl/spec/sim-old/unisims/fdr_1.v +0 -63
- fdre.v hdl/spec/sim-old/unisims/fdre.v +0 -64
- fdre_1.v hdl/spec/sim-old/unisims/fdre_1.v +0 -63
- fdrs.v hdl/spec/sim-old/unisims/fdrs.v +0 -67
- fdrs_1.v hdl/spec/sim-old/unisims/fdrs_1.v +0 -67
- fdrse.v hdl/spec/sim-old/unisims/fdrse.v +0 -66
- fdrse_1.v hdl/spec/sim-old/unisims/fdrse_1.v +0 -66
- fds.v hdl/spec/sim-old/unisims/fds.v +0 -63
- fds_1.v hdl/spec/sim-old/unisims/fds_1.v +0 -63
- fdse.v hdl/spec/sim-old/unisims/fdse.v +0 -63
- fdse_1.v hdl/spec/sim-old/unisims/fdse_1.v +0 -63
- fifo16.v hdl/spec/sim-old/unisims/fifo16.v +0 -798
- fifo18.v hdl/spec/sim-old/unisims/fifo18.v +0 -142
- fifo18_36.v hdl/spec/sim-old/unisims/fifo18_36.v +0 -139
- fifo36.v hdl/spec/sim-old/unisims/fifo36.v +0 -162
- fifo36_72.v hdl/spec/sim-old/unisims/fifo36_72.v +0 -189
- fifo36_72_exp.v hdl/spec/sim-old/unisims/fifo36_72_exp.v +0 -498
- fifo36_exp.v hdl/spec/sim-old/unisims/fifo36_exp.v +0 -327
- fmap.v hdl/spec/sim-old/unisims/fmap.v +0 -28
- frame_ecc_virtex4.v hdl/spec/sim-old/unisims/frame_ecc_virtex4.v +0 -28
- frame_ecc_virtex5.v hdl/spec/sim-old/unisims/frame_ecc_virtex5.v +0 -38
- glbl.v hdl/spec/sim-old/unisims/glbl.v +0 -36
- gnd.v hdl/spec/sim-old/unisims/gnd.v +0 -30
- gt.v hdl/spec/sim-old/unisims/gt.v +0 -1048
- gt10.v hdl/spec/sim-old/unisims/gt10.v +0 -1787
- gt10_10ge_4.v hdl/spec/sim-old/unisims/gt10_10ge_4.v +0 -318
- gt10_10ge_8.v hdl/spec/sim-old/unisims/gt10_10ge_8.v +0 -311
- gt10_10gfc_4.v hdl/spec/sim-old/unisims/gt10_10gfc_4.v +0 -318
- gt10_10gfc_8.v hdl/spec/sim-old/unisims/gt10_10gfc_8.v +0 -310
- gt10_aurora_1.v hdl/spec/sim-old/unisims/gt10_aurora_1.v +0 -322
- gt10_aurora_2.v hdl/spec/sim-old/unisims/gt10_aurora_2.v +0 -322
- gt10_aurora_4.v hdl/spec/sim-old/unisims/gt10_aurora_4.v +0 -322
- gt10_aurorax_4.v hdl/spec/sim-old/unisims/gt10_aurorax_4.v +0 -316
- gt10_aurorax_8.v hdl/spec/sim-old/unisims/gt10_aurorax_8.v +0 -308
- gt10_custom.v hdl/spec/sim-old/unisims/gt10_custom.v +0 -349
- gt10_infiniband_1.v hdl/spec/sim-old/unisims/gt10_infiniband_1.v +0 -329
- gt10_infiniband_2.v hdl/spec/sim-old/unisims/gt10_infiniband_2.v +0 -329
- gt10_infiniband_4.v hdl/spec/sim-old/unisims/gt10_infiniband_4.v +0 -329
- gt10_oc192_4.v hdl/spec/sim-old/unisims/gt10_oc192_4.v +0 -274
- gt10_oc192_8.v hdl/spec/sim-old/unisims/gt10_oc192_8.v +0 -266
- gt10_oc48_1.v hdl/spec/sim-old/unisims/gt10_oc48_1.v +0 -283
- gt10_oc48_2.v hdl/spec/sim-old/unisims/gt10_oc48_2.v +0 -283
- gt10_oc48_4.v hdl/spec/sim-old/unisims/gt10_oc48_4.v +0 -283
- gt10_pci_express_1.v hdl/spec/sim-old/unisims/gt10_pci_express_1.v +0 -329
- gt10_pci_express_2.v hdl/spec/sim-old/unisims/gt10_pci_express_2.v +0 -329
- gt10_pci_express_4.v hdl/spec/sim-old/unisims/gt10_pci_express_4.v +0 -329
- gt10_xaui_1.v hdl/spec/sim-old/unisims/gt10_xaui_1.v +0 -329
- gt10_xaui_2.v hdl/spec/sim-old/unisims/gt10_xaui_2.v +0 -329
- gt10_xaui_4.v hdl/spec/sim-old/unisims/gt10_xaui_4.v +0 -329
- gt11.v hdl/spec/sim-old/unisims/gt11.v +0 -2594
- gt11_custom.v hdl/spec/sim-old/unisims/gt11_custom.v +0 -690
- gt11_dual.v hdl/spec/sim-old/unisims/gt11_dual.v +0 -1349
- gt11clk.v hdl/spec/sim-old/unisims/gt11clk.v +0 -126
- gt11clk_mgt.v hdl/spec/sim-old/unisims/gt11clk_mgt.v +0 -73
- gt_aurora_1.v hdl/spec/sim-old/unisims/gt_aurora_1.v +0 -271
- gt_aurora_2.v hdl/spec/sim-old/unisims/gt_aurora_2.v +0 -271
- gt_aurora_4.v hdl/spec/sim-old/unisims/gt_aurora_4.v +0 -263
- gt_custom.v hdl/spec/sim-old/unisims/gt_custom.v +0 -304
- gt_ethernet_1.v hdl/spec/sim-old/unisims/gt_ethernet_1.v +0 -265
- gt_ethernet_2.v hdl/spec/sim-old/unisims/gt_ethernet_2.v +0 -265
- gt_ethernet_4.v hdl/spec/sim-old/unisims/gt_ethernet_4.v +0 -257
- gt_fibre_chan_1.v hdl/spec/sim-old/unisims/gt_fibre_chan_1.v +0 -265
- gt_fibre_chan_2.v hdl/spec/sim-old/unisims/gt_fibre_chan_2.v +0 -265
- gt_fibre_chan_4.v hdl/spec/sim-old/unisims/gt_fibre_chan_4.v +0 -257
- gt_infiniband_1.v hdl/spec/sim-old/unisims/gt_infiniband_1.v +0 -272
- gt_infiniband_2.v hdl/spec/sim-old/unisims/gt_infiniband_2.v +0 -272
- gt_infiniband_4.v hdl/spec/sim-old/unisims/gt_infiniband_4.v +0 -264
- gt_xaui_1.v hdl/spec/sim-old/unisims/gt_xaui_1.v +0 -274
- gt_xaui_2.v hdl/spec/sim-old/unisims/gt_xaui_2.v +0 -274
- gt_xaui_4.v hdl/spec/sim-old/unisims/gt_xaui_4.v +0 -266
- gtp_dual.v hdl/spec/sim-old/unisims/gtp_dual.v +0 -3525
- gtx_dual.v hdl/spec/sim-old/unisims/gtx_dual.v +0 -3960
- ibuf.v hdl/spec/sim-old/unisims/ibuf.v +0 -73
- ibuf_agp.v hdl/spec/sim-old/unisims/ibuf_agp.v +0 -33
- ibuf_ctt.v hdl/spec/sim-old/unisims/ibuf_ctt.v +0 -33
- ibuf_dly_adj.v hdl/spec/sim-old/unisims/ibuf_dly_adj.v +0 -137
- ibuf_gtl.v hdl/spec/sim-old/unisims/ibuf_gtl.v +0 -33
- ibuf_gtl_dci.v hdl/spec/sim-old/unisims/ibuf_gtl_dci.v +0 -33
- ibuf_gtlp.v hdl/spec/sim-old/unisims/ibuf_gtlp.v +0 -33
- ibuf_gtlp_dci.v hdl/spec/sim-old/unisims/ibuf_gtlp_dci.v +0 -33
- ibuf_hstl_i.v hdl/spec/sim-old/unisims/ibuf_hstl_i.v +0 -33
- ibuf_hstl_i_18.v hdl/spec/sim-old/unisims/ibuf_hstl_i_18.v +0 -33
- ibuf_hstl_i_dci.v hdl/spec/sim-old/unisims/ibuf_hstl_i_dci.v +0 -33
- ibuf_hstl_i_dci_18.v hdl/spec/sim-old/unisims/ibuf_hstl_i_dci_18.v +0 -33
- ibuf_hstl_ii.v hdl/spec/sim-old/unisims/ibuf_hstl_ii.v +0 -33
- ibuf_hstl_ii_18.v hdl/spec/sim-old/unisims/ibuf_hstl_ii_18.v +0 -33
- ibuf_hstl_ii_dci.v hdl/spec/sim-old/unisims/ibuf_hstl_ii_dci.v +0 -33
- ibuf_hstl_ii_dci_18.v hdl/spec/sim-old/unisims/ibuf_hstl_ii_dci_18.v +0 -33
- ibuf_hstl_iii.v hdl/spec/sim-old/unisims/ibuf_hstl_iii.v +0 -33
- ibuf_hstl_iii_18.v hdl/spec/sim-old/unisims/ibuf_hstl_iii_18.v +0 -33
- ibuf_hstl_iii_dci.v hdl/spec/sim-old/unisims/ibuf_hstl_iii_dci.v +0 -33
- ibuf_hstl_iii_dci_18.v hdl/spec/sim-old/unisims/ibuf_hstl_iii_dci_18.v +0 -33
- ibuf_hstl_iv.v hdl/spec/sim-old/unisims/ibuf_hstl_iv.v +0 -33
- ibuf_hstl_iv_18.v hdl/spec/sim-old/unisims/ibuf_hstl_iv_18.v +0 -33
- ibuf_hstl_iv_dci.v hdl/spec/sim-old/unisims/ibuf_hstl_iv_dci.v +0 -33
- ibuf_hstl_iv_dci_18.v hdl/spec/sim-old/unisims/ibuf_hstl_iv_dci_18.v +0 -33
- ibuf_lvcmos12.v hdl/spec/sim-old/unisims/ibuf_lvcmos12.v +0 -33
- ibuf_lvcmos15.v hdl/spec/sim-old/unisims/ibuf_lvcmos15.v +0 -33
- ibuf_lvcmos18.v hdl/spec/sim-old/unisims/ibuf_lvcmos18.v +0 -33
- ibuf_lvcmos2.v hdl/spec/sim-old/unisims/ibuf_lvcmos2.v +0 -33
- ibuf_lvcmos25.v hdl/spec/sim-old/unisims/ibuf_lvcmos25.v +0 -33
- ibuf_lvcmos33.v hdl/spec/sim-old/unisims/ibuf_lvcmos33.v +0 -33
- ibuf_lvdci_15.v hdl/spec/sim-old/unisims/ibuf_lvdci_15.v +0 -33
- ibuf_lvdci_18.v hdl/spec/sim-old/unisims/ibuf_lvdci_18.v +0 -33
- ibuf_lvdci_25.v hdl/spec/sim-old/unisims/ibuf_lvdci_25.v +0 -33
- ibuf_lvdci_33.v hdl/spec/sim-old/unisims/ibuf_lvdci_33.v +0 -33
- ibuf_lvdci_dv2_15.v hdl/spec/sim-old/unisims/ibuf_lvdci_dv2_15.v +0 -33
- ibuf_lvdci_dv2_18.v hdl/spec/sim-old/unisims/ibuf_lvdci_dv2_18.v +0 -33
- ibuf_lvdci_dv2_25.v hdl/spec/sim-old/unisims/ibuf_lvdci_dv2_25.v +0 -33
- ibuf_lvdci_dv2_33.v hdl/spec/sim-old/unisims/ibuf_lvdci_dv2_33.v +0 -33
- ibuf_lvds.v hdl/spec/sim-old/unisims/ibuf_lvds.v +0 -33
- ibuf_lvpecl.v hdl/spec/sim-old/unisims/ibuf_lvpecl.v +0 -33
- ibuf_lvttl.v hdl/spec/sim-old/unisims/ibuf_lvttl.v +0 -33
- ibuf_pci33_3.v hdl/spec/sim-old/unisims/ibuf_pci33_3.v +0 -33
- ibuf_pci33_5.v hdl/spec/sim-old/unisims/ibuf_pci33_5.v +0 -33
- ibuf_pci66_3.v hdl/spec/sim-old/unisims/ibuf_pci66_3.v +0 -33
- ibuf_pcix.v hdl/spec/sim-old/unisims/ibuf_pcix.v +0 -33
- ibuf_pcix66_3.v hdl/spec/sim-old/unisims/ibuf_pcix66_3.v +0 -33
- ibuf_sstl18_i.v hdl/spec/sim-old/unisims/ibuf_sstl18_i.v +0 -33
- ibuf_sstl18_i_dci.v hdl/spec/sim-old/unisims/ibuf_sstl18_i_dci.v +0 -33
- ibuf_sstl18_ii.v hdl/spec/sim-old/unisims/ibuf_sstl18_ii.v +0 -33
- ibuf_sstl18_ii_dci.v hdl/spec/sim-old/unisims/ibuf_sstl18_ii_dci.v +0 -33
- ibuf_sstl2_i.v hdl/spec/sim-old/unisims/ibuf_sstl2_i.v +0 -33
- ibuf_sstl2_i_dci.v hdl/spec/sim-old/unisims/ibuf_sstl2_i_dci.v +0 -33
- ibuf_sstl2_ii.v hdl/spec/sim-old/unisims/ibuf_sstl2_ii.v +0 -33
- ibuf_sstl2_ii_dci.v hdl/spec/sim-old/unisims/ibuf_sstl2_ii_dci.v +0 -33
- ibuf_sstl3_i.v hdl/spec/sim-old/unisims/ibuf_sstl3_i.v +0 -33
- ibuf_sstl3_i_dci.v hdl/spec/sim-old/unisims/ibuf_sstl3_i_dci.v +0 -33
- ibuf_sstl3_ii.v hdl/spec/sim-old/unisims/ibuf_sstl3_ii.v +0 -33
- ibuf_sstl3_ii_dci.v hdl/spec/sim-old/unisims/ibuf_sstl3_ii_dci.v +0 -33
- ibufds.v hdl/spec/sim-old/unisims/ibufds.v +0 -96
- ibufds_blvds_25.v hdl/spec/sim-old/unisims/ibufds_blvds_25.v +0 -43
- ibufds_diff_out.v hdl/spec/sim-old/unisims/ibufds_diff_out.v +0 -45
- ibufds_dly_adj.v hdl/spec/sim-old/unisims/ibufds_dly_adj.v +0 -147
- ibufds_ldt_25.v hdl/spec/sim-old/unisims/ibufds_ldt_25.v +0 -43
- ibufds_lvds_25.v hdl/spec/sim-old/unisims/ibufds_lvds_25.v +0 -43
- ibufds_lvds_25_dci.v hdl/spec/sim-old/unisims/ibufds_lvds_25_dci.v +0 -43
- ibufds_lvds_33.v hdl/spec/sim-old/unisims/ibufds_lvds_33.v +0 -43
- ibufds_lvds_33_dci.v hdl/spec/sim-old/unisims/ibufds_lvds_33_dci.v +0 -43
- ibufds_lvdsext_25.v hdl/spec/sim-old/unisims/ibufds_lvdsext_25.v +0 -43
- ibufds_lvdsext_25_dci.v hdl/spec/sim-old/unisims/ibufds_lvdsext_25_dci.v +0 -43
- ibufds_lvdsext_33.v hdl/spec/sim-old/unisims/ibufds_lvdsext_33.v +0 -43
- ibufds_lvdsext_33_dci.v hdl/spec/sim-old/unisims/ibufds_lvdsext_33_dci.v +0 -43
- ibufds_lvpecl_25.v hdl/spec/sim-old/unisims/ibufds_lvpecl_25.v +0 -43
- ibufds_lvpecl_33.v hdl/spec/sim-old/unisims/ibufds_lvpecl_33.v +0 -43
- ibufds_ulvds_25.v hdl/spec/sim-old/unisims/ibufds_ulvds_25.v +0 -43
- ibufg.v hdl/spec/sim-old/unisims/ibufg.v +0 -59
- ibufg_agp.v hdl/spec/sim-old/unisims/ibufg_agp.v +0 -33
- ibufg_ctt.v hdl/spec/sim-old/unisims/ibufg_ctt.v +0 -33
- ibufg_gtl.v hdl/spec/sim-old/unisims/ibufg_gtl.v +0 -33
- ibufg_gtl_dci.v hdl/spec/sim-old/unisims/ibufg_gtl_dci.v +0 -33
- ibufg_gtlp.v hdl/spec/sim-old/unisims/ibufg_gtlp.v +0 -33
- ibufg_gtlp_dci.v hdl/spec/sim-old/unisims/ibufg_gtlp_dci.v +0 -33
- ibufg_hstl_i.v hdl/spec/sim-old/unisims/ibufg_hstl_i.v +0 -33
- ibufg_hstl_i_18.v hdl/spec/sim-old/unisims/ibufg_hstl_i_18.v +0 -33
- ibufg_hstl_i_dci.v hdl/spec/sim-old/unisims/ibufg_hstl_i_dci.v +0 -33
- ibufg_hstl_i_dci_18.v hdl/spec/sim-old/unisims/ibufg_hstl_i_dci_18.v +0 -33
- ibufg_hstl_ii.v hdl/spec/sim-old/unisims/ibufg_hstl_ii.v +0 -33
- ibufg_hstl_ii_18.v hdl/spec/sim-old/unisims/ibufg_hstl_ii_18.v +0 -33
- ibufg_hstl_ii_dci.v hdl/spec/sim-old/unisims/ibufg_hstl_ii_dci.v +0 -33
- ibufg_hstl_ii_dci_18.v hdl/spec/sim-old/unisims/ibufg_hstl_ii_dci_18.v +0 -33
- ibufg_hstl_iii.v hdl/spec/sim-old/unisims/ibufg_hstl_iii.v +0 -33
- ibufg_hstl_iii_18.v hdl/spec/sim-old/unisims/ibufg_hstl_iii_18.v +0 -33
- ibufg_hstl_iii_dci.v hdl/spec/sim-old/unisims/ibufg_hstl_iii_dci.v +0 -33
- ibufg_hstl_iii_dci_18.v hdl/spec/sim-old/unisims/ibufg_hstl_iii_dci_18.v +0 -33
- ibufg_hstl_iv.v hdl/spec/sim-old/unisims/ibufg_hstl_iv.v +0 -33
- ibufg_hstl_iv_18.v hdl/spec/sim-old/unisims/ibufg_hstl_iv_18.v +0 -33
- ibufg_hstl_iv_dci.v hdl/spec/sim-old/unisims/ibufg_hstl_iv_dci.v +0 -33
- ibufg_hstl_iv_dci_18.v hdl/spec/sim-old/unisims/ibufg_hstl_iv_dci_18.v +0 -33
- ibufg_lvcmos12.v hdl/spec/sim-old/unisims/ibufg_lvcmos12.v +0 -33
- ibufg_lvcmos15.v hdl/spec/sim-old/unisims/ibufg_lvcmos15.v +0 -33
- ibufg_lvcmos18.v hdl/spec/sim-old/unisims/ibufg_lvcmos18.v +0 -33
- ibufg_lvcmos2.v hdl/spec/sim-old/unisims/ibufg_lvcmos2.v +0 -33
- ibufg_lvcmos25.v hdl/spec/sim-old/unisims/ibufg_lvcmos25.v +0 -33
- ibufg_lvcmos33.v hdl/spec/sim-old/unisims/ibufg_lvcmos33.v +0 -33
- ibufg_lvdci_15.v hdl/spec/sim-old/unisims/ibufg_lvdci_15.v +0 -33
- ibufg_lvdci_18.v hdl/spec/sim-old/unisims/ibufg_lvdci_18.v +0 -33
- ibufg_lvdci_25.v hdl/spec/sim-old/unisims/ibufg_lvdci_25.v +0 -33
- ibufg_lvdci_33.v hdl/spec/sim-old/unisims/ibufg_lvdci_33.v +0 -33
- ibufg_lvdci_dv2_15.v hdl/spec/sim-old/unisims/ibufg_lvdci_dv2_15.v +0 -33
- ibufg_lvdci_dv2_18.v hdl/spec/sim-old/unisims/ibufg_lvdci_dv2_18.v +0 -33
- ibufg_lvdci_dv2_25.v hdl/spec/sim-old/unisims/ibufg_lvdci_dv2_25.v +0 -33
- ibufg_lvdci_dv2_33.v hdl/spec/sim-old/unisims/ibufg_lvdci_dv2_33.v +0 -33
- ibufg_lvds.v hdl/spec/sim-old/unisims/ibufg_lvds.v +0 -33
- ibufg_lvpecl.v hdl/spec/sim-old/unisims/ibufg_lvpecl.v +0 -33
- ibufg_lvttl.v hdl/spec/sim-old/unisims/ibufg_lvttl.v +0 -33
- ibufg_pci33_3.v hdl/spec/sim-old/unisims/ibufg_pci33_3.v +0 -33
- ibufg_pci33_5.v hdl/spec/sim-old/unisims/ibufg_pci33_5.v +0 -33
- ibufg_pci66_3.v hdl/spec/sim-old/unisims/ibufg_pci66_3.v +0 -33
- ibufg_pcix.v hdl/spec/sim-old/unisims/ibufg_pcix.v +0 -33
- ibufg_pcix66_3.v hdl/spec/sim-old/unisims/ibufg_pcix66_3.v +0 -33
- ibufg_sstl18_i.v hdl/spec/sim-old/unisims/ibufg_sstl18_i.v +0 -33
- ibufg_sstl18_i_dci.v hdl/spec/sim-old/unisims/ibufg_sstl18_i_dci.v +0 -33
- ibufg_sstl18_ii.v hdl/spec/sim-old/unisims/ibufg_sstl18_ii.v +0 -33
- ibufg_sstl18_ii_dci.v hdl/spec/sim-old/unisims/ibufg_sstl18_ii_dci.v +0 -33
- ibufg_sstl2_i.v hdl/spec/sim-old/unisims/ibufg_sstl2_i.v +0 -33
- ibufg_sstl2_i_dci.v hdl/spec/sim-old/unisims/ibufg_sstl2_i_dci.v +0 -33
- ibufg_sstl2_ii.v hdl/spec/sim-old/unisims/ibufg_sstl2_ii.v +0 -33
- ibufg_sstl2_ii_dci.v hdl/spec/sim-old/unisims/ibufg_sstl2_ii_dci.v +0 -33
- ibufg_sstl3_i.v hdl/spec/sim-old/unisims/ibufg_sstl3_i.v +0 -33
- ibufg_sstl3_i_dci.v hdl/spec/sim-old/unisims/ibufg_sstl3_i_dci.v +0 -33
- ibufg_sstl3_ii.v hdl/spec/sim-old/unisims/ibufg_sstl3_ii.v +0 -33
- ibufg_sstl3_ii_dci.v hdl/spec/sim-old/unisims/ibufg_sstl3_ii_dci.v +0 -33
- ibufgds.v hdl/spec/sim-old/unisims/ibufgds.v +0 -87
- ibufgds_blvds_25.v hdl/spec/sim-old/unisims/ibufgds_blvds_25.v +0 -43
- ibufgds_diff_out.v hdl/spec/sim-old/unisims/ibufgds_diff_out.v +0 -45
- ibufgds_ldt_25.v hdl/spec/sim-old/unisims/ibufgds_ldt_25.v +0 -43
- ibufgds_lvds_25.v hdl/spec/sim-old/unisims/ibufgds_lvds_25.v +0 -43
- ibufgds_lvds_25_dci.v hdl/spec/sim-old/unisims/ibufgds_lvds_25_dci.v +0 -43
- ibufgds_lvds_33.v hdl/spec/sim-old/unisims/ibufgds_lvds_33.v +0 -43
- ibufgds_lvds_33_dci.v hdl/spec/sim-old/unisims/ibufgds_lvds_33_dci.v +0 -43
- ibufgds_lvdsext_25.v hdl/spec/sim-old/unisims/ibufgds_lvdsext_25.v +0 -43
- ibufgds_lvdsext_25_dci.v hdl/spec/sim-old/unisims/ibufgds_lvdsext_25_dci.v +0 -43
- ibufgds_lvdsext_33.v hdl/spec/sim-old/unisims/ibufgds_lvdsext_33.v +0 -43
- ibufgds_lvdsext_33_dci.v hdl/spec/sim-old/unisims/ibufgds_lvdsext_33_dci.v +0 -43
- ibufgds_lvpecl_25.v hdl/spec/sim-old/unisims/ibufgds_lvpecl_25.v +0 -43
- ibufgds_lvpecl_33.v hdl/spec/sim-old/unisims/ibufgds_lvpecl_33.v +0 -43
- ibufgds_ulvds_25.v hdl/spec/sim-old/unisims/ibufgds_ulvds_25.v +0 -43
- icap_spartan3a.v hdl/spec/sim-old/unisims/icap_spartan3a.v +0 -30
- icap_virtex2.v hdl/spec/sim-old/unisims/icap_virtex2.v +0 -31
- icap_virtex4.v hdl/spec/sim-old/unisims/icap_virtex4.v +0 -36
- icap_virtex5.v hdl/spec/sim-old/unisims/icap_virtex5.v +0 -57
- iddr.v hdl/spec/sim-old/unisims/iddr.v +0 -184
- iddr2.v hdl/spec/sim-old/unisims/iddr2.v +0 -172
- iddr_2clk.v hdl/spec/sim-old/unisims/iddr_2clk.v +0 -186
- idelay.v hdl/spec/sim-old/unisims/idelay.v +0 -303
- idelayctrl.v hdl/spec/sim-old/unisims/idelayctrl.v +0 -125
- ifddrcpe.v hdl/spec/sim-old/unisims/ifddrcpe.v +0 -49
- ifddrrse.v hdl/spec/sim-old/unisims/ifddrrse.v +0 -49
- inv.v hdl/spec/sim-old/unisims/inv.v +0 -32
- iobuf.v hdl/spec/sim-old/unisims/iobuf.v +0 -83
- iobuf_agp.v hdl/spec/sim-old/unisims/iobuf_agp.v +0 -43
- iobuf_ctt.v hdl/spec/sim-old/unisims/iobuf_ctt.v +0 -43
- iobuf_f_12.v hdl/spec/sim-old/unisims/iobuf_f_12.v +0 -43
- iobuf_f_16.v hdl/spec/sim-old/unisims/iobuf_f_16.v +0 -43
- iobuf_f_2.v hdl/spec/sim-old/unisims/iobuf_f_2.v +0 -43
- iobuf_f_24.v hdl/spec/sim-old/unisims/iobuf_f_24.v +0 -43
- iobuf_f_4.v hdl/spec/sim-old/unisims/iobuf_f_4.v +0 -43
- iobuf_f_6.v hdl/spec/sim-old/unisims/iobuf_f_6.v +0 -43
- iobuf_f_8.v hdl/spec/sim-old/unisims/iobuf_f_8.v +0 -43
- iobuf_gtl.v hdl/spec/sim-old/unisims/iobuf_gtl.v +0 -43
- iobuf_gtl_dci.v hdl/spec/sim-old/unisims/iobuf_gtl_dci.v +0 -43
- iobuf_gtlp.v hdl/spec/sim-old/unisims/iobuf_gtlp.v +0 -43
- iobuf_gtlp_dci.v hdl/spec/sim-old/unisims/iobuf_gtlp_dci.v +0 -43
- iobuf_hstl_i.v hdl/spec/sim-old/unisims/iobuf_hstl_i.v +0 -43
- iobuf_hstl_i_18.v hdl/spec/sim-old/unisims/iobuf_hstl_i_18.v +0 -43
- iobuf_hstl_ii.v hdl/spec/sim-old/unisims/iobuf_hstl_ii.v +0 -43
- iobuf_hstl_ii_18.v hdl/spec/sim-old/unisims/iobuf_hstl_ii_18.v +0 -43
- iobuf_hstl_ii_dci.v hdl/spec/sim-old/unisims/iobuf_hstl_ii_dci.v +0 -43
- iobuf_hstl_ii_dci_18.v hdl/spec/sim-old/unisims/iobuf_hstl_ii_dci_18.v +0 -43
- iobuf_hstl_iii.v hdl/spec/sim-old/unisims/iobuf_hstl_iii.v +0 -43
- iobuf_hstl_iii_18.v hdl/spec/sim-old/unisims/iobuf_hstl_iii_18.v +0 -43
- iobuf_hstl_iv.v hdl/spec/sim-old/unisims/iobuf_hstl_iv.v +0 -43
- iobuf_hstl_iv_18.v hdl/spec/sim-old/unisims/iobuf_hstl_iv_18.v +0 -43
- iobuf_hstl_iv_dci.v hdl/spec/sim-old/unisims/iobuf_hstl_iv_dci.v +0 -43
- iobuf_hstl_iv_dci_18.v hdl/spec/sim-old/unisims/iobuf_hstl_iv_dci_18.v +0 -43
- iobuf_lvcmos12.v hdl/spec/sim-old/unisims/iobuf_lvcmos12.v +0 -43
- iobuf_lvcmos12_f_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos12_f_2.v +0 -43
- iobuf_lvcmos12_f_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos12_f_4.v +0 -43
- iobuf_lvcmos12_f_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos12_f_6.v +0 -43
- iobuf_lvcmos12_f_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos12_f_8.v +0 -43
- iobuf_lvcmos12_s_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos12_s_2.v +0 -43
- iobuf_lvcmos12_s_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos12_s_4.v +0 -43
- iobuf_lvcmos12_s_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos12_s_6.v +0 -43
- iobuf_lvcmos12_s_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos12_s_8.v +0 -43
- iobuf_lvcmos15.v hdl/spec/sim-old/unisims/iobuf_lvcmos15.v +0 -43
- iobuf_lvcmos15_f_12.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_f_12.v +0 -43
- iobuf_lvcmos15_f_16.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_f_16.v +0 -43
- iobuf_lvcmos15_f_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_f_2.v +0 -43
- iobuf_lvcmos15_f_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_f_4.v +0 -43
- iobuf_lvcmos15_f_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_f_6.v +0 -43
- iobuf_lvcmos15_f_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_f_8.v +0 -43
- iobuf_lvcmos15_s_12.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_s_12.v +0 -43
- iobuf_lvcmos15_s_16.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_s_16.v +0 -43
- iobuf_lvcmos15_s_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_s_2.v +0 -43
- iobuf_lvcmos15_s_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_s_4.v +0 -43
- iobuf_lvcmos15_s_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_s_6.v +0 -43
- iobuf_lvcmos15_s_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos15_s_8.v +0 -43
- iobuf_lvcmos18.v hdl/spec/sim-old/unisims/iobuf_lvcmos18.v +0 -43
- iobuf_lvcmos18_f_12.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_f_12.v +0 -43
- iobuf_lvcmos18_f_16.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_f_16.v +0 -43
- iobuf_lvcmos18_f_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_f_2.v +0 -43
- iobuf_lvcmos18_f_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_f_4.v +0 -43
- iobuf_lvcmos18_f_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_f_6.v +0 -43
- iobuf_lvcmos18_f_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_f_8.v +0 -43
- iobuf_lvcmos18_s_12.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_s_12.v +0 -43
- iobuf_lvcmos18_s_16.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_s_16.v +0 -43
- iobuf_lvcmos18_s_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_s_2.v +0 -43
- iobuf_lvcmos18_s_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_s_4.v +0 -43
- iobuf_lvcmos18_s_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_s_6.v +0 -43
- iobuf_lvcmos18_s_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos18_s_8.v +0 -43
- iobuf_lvcmos2.v hdl/spec/sim-old/unisims/iobuf_lvcmos2.v +0 -43
- iobuf_lvcmos25.v hdl/spec/sim-old/unisims/iobuf_lvcmos25.v +0 -43
- iobuf_lvcmos25_f_12.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_f_12.v +0 -43
- iobuf_lvcmos25_f_16.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_f_16.v +0 -43
- iobuf_lvcmos25_f_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_f_2.v +0 -43
- iobuf_lvcmos25_f_24.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_f_24.v +0 -43
- iobuf_lvcmos25_f_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_f_4.v +0 -43
- iobuf_lvcmos25_f_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_f_6.v +0 -43
- iobuf_lvcmos25_f_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_f_8.v +0 -43
- iobuf_lvcmos25_s_12.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_s_12.v +0 -43
- iobuf_lvcmos25_s_16.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_s_16.v +0 -43
- iobuf_lvcmos25_s_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_s_2.v +0 -43
- iobuf_lvcmos25_s_24.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_s_24.v +0 -43
- iobuf_lvcmos25_s_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_s_4.v +0 -43
- iobuf_lvcmos25_s_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_s_6.v +0 -43
- iobuf_lvcmos25_s_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos25_s_8.v +0 -43
- iobuf_lvcmos33.v hdl/spec/sim-old/unisims/iobuf_lvcmos33.v +0 -43
- iobuf_lvcmos33_f_12.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_f_12.v +0 -43
- iobuf_lvcmos33_f_16.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_f_16.v +0 -43
- iobuf_lvcmos33_f_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_f_2.v +0 -43
- iobuf_lvcmos33_f_24.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_f_24.v +0 -43
- iobuf_lvcmos33_f_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_f_4.v +0 -43
- iobuf_lvcmos33_f_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_f_6.v +0 -43
- iobuf_lvcmos33_f_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_f_8.v +0 -43
- iobuf_lvcmos33_s_12.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_s_12.v +0 -43
- iobuf_lvcmos33_s_16.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_s_16.v +0 -43
- iobuf_lvcmos33_s_2.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_s_2.v +0 -43
- iobuf_lvcmos33_s_24.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_s_24.v +0 -43
- iobuf_lvcmos33_s_4.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_s_4.v +0 -43
- iobuf_lvcmos33_s_6.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_s_6.v +0 -43
- iobuf_lvcmos33_s_8.v hdl/spec/sim-old/unisims/iobuf_lvcmos33_s_8.v +0 -43
- iobuf_lvdci_15.v hdl/spec/sim-old/unisims/iobuf_lvdci_15.v +0 -43
- iobuf_lvdci_18.v hdl/spec/sim-old/unisims/iobuf_lvdci_18.v +0 -43
- iobuf_lvdci_25.v hdl/spec/sim-old/unisims/iobuf_lvdci_25.v +0 -43
- iobuf_lvdci_33.v hdl/spec/sim-old/unisims/iobuf_lvdci_33.v +0 -43
- iobuf_lvdci_dv2_15.v hdl/spec/sim-old/unisims/iobuf_lvdci_dv2_15.v +0 -43
- iobuf_lvdci_dv2_18.v hdl/spec/sim-old/unisims/iobuf_lvdci_dv2_18.v +0 -43
- iobuf_lvdci_dv2_25.v hdl/spec/sim-old/unisims/iobuf_lvdci_dv2_25.v +0 -43
- iobuf_lvdci_dv2_33.v hdl/spec/sim-old/unisims/iobuf_lvdci_dv2_33.v +0 -43
- iobuf_lvds.v hdl/spec/sim-old/unisims/iobuf_lvds.v +0 -43
- iobuf_lvpecl.v hdl/spec/sim-old/unisims/iobuf_lvpecl.v +0 -43
- iobuf_lvttl.v hdl/spec/sim-old/unisims/iobuf_lvttl.v +0 -43
- iobuf_lvttl_f_12.v hdl/spec/sim-old/unisims/iobuf_lvttl_f_12.v +0 -43
- iobuf_lvttl_f_16.v hdl/spec/sim-old/unisims/iobuf_lvttl_f_16.v +0 -43
- iobuf_lvttl_f_2.v hdl/spec/sim-old/unisims/iobuf_lvttl_f_2.v +0 -43
- iobuf_lvttl_f_24.v hdl/spec/sim-old/unisims/iobuf_lvttl_f_24.v +0 -43
- iobuf_lvttl_f_4.v hdl/spec/sim-old/unisims/iobuf_lvttl_f_4.v +0 -43
- iobuf_lvttl_f_6.v hdl/spec/sim-old/unisims/iobuf_lvttl_f_6.v +0 -43
- iobuf_lvttl_f_8.v hdl/spec/sim-old/unisims/iobuf_lvttl_f_8.v +0 -43
- iobuf_lvttl_s_12.v hdl/spec/sim-old/unisims/iobuf_lvttl_s_12.v +0 -43
- iobuf_lvttl_s_16.v hdl/spec/sim-old/unisims/iobuf_lvttl_s_16.v +0 -43
- iobuf_lvttl_s_2.v hdl/spec/sim-old/unisims/iobuf_lvttl_s_2.v +0 -43
- iobuf_lvttl_s_24.v hdl/spec/sim-old/unisims/iobuf_lvttl_s_24.v +0 -43
- iobuf_lvttl_s_4.v hdl/spec/sim-old/unisims/iobuf_lvttl_s_4.v +0 -43
- iobuf_lvttl_s_6.v hdl/spec/sim-old/unisims/iobuf_lvttl_s_6.v +0 -43
- iobuf_lvttl_s_8.v hdl/spec/sim-old/unisims/iobuf_lvttl_s_8.v +0 -43
- iobuf_pci33_3.v hdl/spec/sim-old/unisims/iobuf_pci33_3.v +0 -43
- iobuf_pci33_5.v hdl/spec/sim-old/unisims/iobuf_pci33_5.v +0 -43
- iobuf_pci66_3.v hdl/spec/sim-old/unisims/iobuf_pci66_3.v +0 -43
- iobuf_pcix.v hdl/spec/sim-old/unisims/iobuf_pcix.v +0 -43
- iobuf_pcix66_3.v hdl/spec/sim-old/unisims/iobuf_pcix66_3.v +0 -43
- iobuf_s_12.v hdl/spec/sim-old/unisims/iobuf_s_12.v +0 -43
- iobuf_s_16.v hdl/spec/sim-old/unisims/iobuf_s_16.v +0 -43
- iobuf_s_2.v hdl/spec/sim-old/unisims/iobuf_s_2.v +0 -43
- iobuf_s_24.v hdl/spec/sim-old/unisims/iobuf_s_24.v +0 -43
- iobuf_s_4.v hdl/spec/sim-old/unisims/iobuf_s_4.v +0 -43
- iobuf_s_6.v hdl/spec/sim-old/unisims/iobuf_s_6.v +0 -43
- iobuf_s_8.v hdl/spec/sim-old/unisims/iobuf_s_8.v +0 -43
- iobuf_sstl18_i.v hdl/spec/sim-old/unisims/iobuf_sstl18_i.v +0 -43
- iobuf_sstl18_ii.v hdl/spec/sim-old/unisims/iobuf_sstl18_ii.v +0 -43
- iobuf_sstl18_ii_dci.v hdl/spec/sim-old/unisims/iobuf_sstl18_ii_dci.v +0 -43
- iobuf_sstl2_i.v hdl/spec/sim-old/unisims/iobuf_sstl2_i.v +0 -43
- iobuf_sstl2_ii.v hdl/spec/sim-old/unisims/iobuf_sstl2_ii.v +0 -43
- iobuf_sstl2_ii_dci.v hdl/spec/sim-old/unisims/iobuf_sstl2_ii_dci.v +0 -43
- iobuf_sstl3_i.v hdl/spec/sim-old/unisims/iobuf_sstl3_i.v +0 -43
- iobuf_sstl3_ii.v hdl/spec/sim-old/unisims/iobuf_sstl3_ii.v +0 -43
- iobuf_sstl3_ii_dci.v hdl/spec/sim-old/unisims/iobuf_sstl3_ii_dci.v +0 -43
- iobufds.v hdl/spec/sim-old/unisims/iobufds.v +0 -96
- iobufds_blvds_25.v hdl/spec/sim-old/unisims/iobufds_blvds_25.v +0 -49
- iodelay.v hdl/spec/sim-old/unisims/iodelay.v +0 -631
- iserdes.v hdl/spec/sim-old/unisims/iserdes.v +0 -1327
- iserdes_nodelay.v hdl/spec/sim-old/unisims/iserdes_nodelay.v +0 -1118
- jtag_sim_spartan3a.v hdl/spec/sim-old/unisims/jtag_sim_spartan3a.v +0 -665
- jtag_sim_virtex4.v hdl/spec/sim-old/unisims/jtag_sim_virtex4.v +0 -701
- jtag_sim_virtex5.v hdl/spec/sim-old/unisims/jtag_sim_virtex5.v +0 -691
- jtagppc.v hdl/spec/sim-old/unisims/jtagppc.v +0 -34
- jtagppc440.v hdl/spec/sim-old/unisims/jtagppc440.v +0 -38
- keeper.v hdl/spec/sim-old/unisims/keeper.v +0 -35
- key_clear.v hdl/spec/sim-old/unisims/key_clear.v +0 -31
- ld.v hdl/spec/sim-old/unisims/ld.v +0 -55
- ld_1.v hdl/spec/sim-old/unisims/ld_1.v +0 -55
- ldc.v hdl/spec/sim-old/unisims/ldc.v +0 -60
- ldc_1.v hdl/spec/sim-old/unisims/ldc_1.v +0 -62
- ldce.v hdl/spec/sim-old/unisims/ldce.v +0 -64
- ldce_1.v hdl/spec/sim-old/unisims/ldce_1.v +0 -64
- ldcp.v hdl/spec/sim-old/unisims/ldcp.v +0 -66
- ldcp_1.v hdl/spec/sim-old/unisims/ldcp_1.v +0 -64
- ldcpe.v hdl/spec/sim-old/unisims/ldcpe.v +0 -66
- ldcpe_1.v hdl/spec/sim-old/unisims/ldcpe_1.v +0 -66
- lde.v hdl/spec/sim-old/unisims/lde.v +0 -61
- lde_1.v hdl/spec/sim-old/unisims/lde_1.v +0 -59
- ldp.v hdl/spec/sim-old/unisims/ldp.v +0 -60
- ldp_1.v hdl/spec/sim-old/unisims/ldp_1.v +0 -59
- ldpe.v hdl/spec/sim-old/unisims/ldpe.v +0 -61
- ldpe_1.v hdl/spec/sim-old/unisims/ldpe_1.v +0 -61
- lut1.v hdl/spec/sim-old/unisims/lut1.v +0 -36
- lut1_d.v hdl/spec/sim-old/unisims/lut1_d.v +0 -37
- lut1_l.v hdl/spec/sim-old/unisims/lut1_l.v +0 -36
- lut2.v hdl/spec/sim-old/unisims/lut2.v +0 -52
- lut2_d.v hdl/spec/sim-old/unisims/lut2_d.v +0 -54
- lut2_l.v hdl/spec/sim-old/unisims/lut2_l.v +0 -53
- lut3.v hdl/spec/sim-old/unisims/lut3.v +0 -68
- lut3_d.v hdl/spec/sim-old/unisims/lut3_d.v +0 -69
- lut3_l.v hdl/spec/sim-old/unisims/lut3_l.v +0 -66
- lut4.v hdl/spec/sim-old/unisims/lut4.v +0 -76
- lut4_d.v hdl/spec/sim-old/unisims/lut4_d.v +0 -79
- lut4_l.v hdl/spec/sim-old/unisims/lut4_l.v +0 -76
- lut5.v hdl/spec/sim-old/unisims/lut5.v +0 -115
- lut5_d.v hdl/spec/sim-old/unisims/lut5_d.v +0 -118
- lut5_l.v hdl/spec/sim-old/unisims/lut5_l.v +0 -115
- lut6.v hdl/spec/sim-old/unisims/lut6.v +0 -91
- lut6_2.v hdl/spec/sim-old/unisims/lut6_2.v +0 -141
- lut6_d.v hdl/spec/sim-old/unisims/lut6_d.v +0 -94
- lut6_l.v hdl/spec/sim-old/unisims/lut6_l.v +0 -91
- mult18x18.v hdl/spec/sim-old/unisims/mult18x18.v +0 -145
- mult18x18s.v hdl/spec/sim-old/unisims/mult18x18s.v +0 -164
- mult18x18sio.v hdl/spec/sim-old/unisims/mult18x18sio.v +0 -257
- mult_and.v hdl/spec/sim-old/unisims/mult_and.v +0 -37
- muxcy.v hdl/spec/sim-old/unisims/muxcy.v +0 -40
- muxcy_d.v hdl/spec/sim-old/unisims/muxcy_d.v +0 -44
- muxcy_l.v hdl/spec/sim-old/unisims/muxcy_l.v +0 -38
- muxf5.v hdl/spec/sim-old/unisims/muxf5.v +0 -37
- muxf5_d.v hdl/spec/sim-old/unisims/muxf5_d.v +0 -43
- muxf5_l.v hdl/spec/sim-old/unisims/muxf5_l.v +0 -38
- muxf6.v hdl/spec/sim-old/unisims/muxf6.v +0 -39
- muxf6_d.v hdl/spec/sim-old/unisims/muxf6_d.v +0 -43
- muxf6_l.v hdl/spec/sim-old/unisims/muxf6_l.v +0 -39
- muxf7.v hdl/spec/sim-old/unisims/muxf7.v +0 -38
- muxf7_d.v hdl/spec/sim-old/unisims/muxf7_d.v +0 -43
- muxf7_l.v hdl/spec/sim-old/unisims/muxf7_l.v +0 -38
- muxf8.v hdl/spec/sim-old/unisims/muxf8.v +0 -39
- muxf8_d.v hdl/spec/sim-old/unisims/muxf8_d.v +0 -43
- muxf8_l.v hdl/spec/sim-old/unisims/muxf8_l.v +0 -39
- nand2.v hdl/spec/sim-old/unisims/nand2.v +0 -33
- nand2b1.v hdl/spec/sim-old/unisims/nand2b1.v +0 -37
- nand2b2.v hdl/spec/sim-old/unisims/nand2b2.v +0 -39
- nand3.v hdl/spec/sim-old/unisims/nand3.v +0 -33
- nand3b1.v hdl/spec/sim-old/unisims/nand3b1.v +0 -37
- nand3b2.v hdl/spec/sim-old/unisims/nand3b2.v +0 -39
- nand3b3.v hdl/spec/sim-old/unisims/nand3b3.v +0 -41
- nand4.v hdl/spec/sim-old/unisims/nand4.v +0 -33
- nand4b1.v hdl/spec/sim-old/unisims/nand4b1.v +0 -37
- nand4b2.v hdl/spec/sim-old/unisims/nand4b2.v +0 -39
- nand4b3.v hdl/spec/sim-old/unisims/nand4b3.v +0 -41
- nand4b4.v hdl/spec/sim-old/unisims/nand4b4.v +0 -43
- nand5.v hdl/spec/sim-old/unisims/nand5.v +0 -33
- nand5b1.v hdl/spec/sim-old/unisims/nand5b1.v +0 -37
- nand5b2.v hdl/spec/sim-old/unisims/nand5b2.v +0 -39
- nand5b3.v hdl/spec/sim-old/unisims/nand5b3.v +0 -41
- nand5b4.v hdl/spec/sim-old/unisims/nand5b4.v +0 -43
- nand5b5.v hdl/spec/sim-old/unisims/nand5b5.v +0 -45
- nor2.v hdl/spec/sim-old/unisims/nor2.v +0 -33
- nor2b1.v hdl/spec/sim-old/unisims/nor2b1.v +0 -37
- nor2b2.v hdl/spec/sim-old/unisims/nor2b2.v +0 -39
- nor3.v hdl/spec/sim-old/unisims/nor3.v +0 -33
- nor3b1.v hdl/spec/sim-old/unisims/nor3b1.v +0 -37
- nor3b2.v hdl/spec/sim-old/unisims/nor3b2.v +0 -39
- nor3b3.v hdl/spec/sim-old/unisims/nor3b3.v +0 -41
- nor4.v hdl/spec/sim-old/unisims/nor4.v +0 -33
- nor4b1.v hdl/spec/sim-old/unisims/nor4b1.v +0 -37
- nor4b2.v hdl/spec/sim-old/unisims/nor4b2.v +0 -39
- nor4b3.v hdl/spec/sim-old/unisims/nor4b3.v +0 -41
- nor4b4.v hdl/spec/sim-old/unisims/nor4b4.v +0 -43
- nor5.v hdl/spec/sim-old/unisims/nor5.v +0 -33
- nor5b1.v hdl/spec/sim-old/unisims/nor5b1.v +0 -37
- nor5b2.v hdl/spec/sim-old/unisims/nor5b2.v +0 -39
- nor5b3.v hdl/spec/sim-old/unisims/nor5b3.v +0 -41
- nor5b4.v hdl/spec/sim-old/unisims/nor5b4.v +0 -43
- nor5b5.v hdl/spec/sim-old/unisims/nor5b5.v +0 -45
- obuf.v hdl/spec/sim-old/unisims/obuf.v +0 -57
- obuf_agp.v hdl/spec/sim-old/unisims/obuf_agp.v +0 -35
- obuf_ctt.v hdl/spec/sim-old/unisims/obuf_ctt.v +0 -35
- obuf_f_12.v hdl/spec/sim-old/unisims/obuf_f_12.v +0 -35
- obuf_f_16.v hdl/spec/sim-old/unisims/obuf_f_16.v +0 -35
- obuf_f_2.v hdl/spec/sim-old/unisims/obuf_f_2.v +0 -35
- obuf_f_24.v hdl/spec/sim-old/unisims/obuf_f_24.v +0 -35
- obuf_f_4.v hdl/spec/sim-old/unisims/obuf_f_4.v +0 -35
- obuf_f_6.v hdl/spec/sim-old/unisims/obuf_f_6.v +0 -35
- obuf_f_8.v hdl/spec/sim-old/unisims/obuf_f_8.v +0 -35
- obuf_gtl.v hdl/spec/sim-old/unisims/obuf_gtl.v +0 -35
- obuf_gtl_dci.v hdl/spec/sim-old/unisims/obuf_gtl_dci.v +0 -35
- obuf_gtlp.v hdl/spec/sim-old/unisims/obuf_gtlp.v +0 -35
- obuf_gtlp_dci.v hdl/spec/sim-old/unisims/obuf_gtlp_dci.v +0 -35
- obuf_hstl_i.v hdl/spec/sim-old/unisims/obuf_hstl_i.v +0 -35
- obuf_hstl_i_18.v hdl/spec/sim-old/unisims/obuf_hstl_i_18.v +0 -35
- obuf_hstl_i_dci.v hdl/spec/sim-old/unisims/obuf_hstl_i_dci.v +0 -35
- obuf_hstl_i_dci_18.v hdl/spec/sim-old/unisims/obuf_hstl_i_dci_18.v +0 -35
- obuf_hstl_ii.v hdl/spec/sim-old/unisims/obuf_hstl_ii.v +0 -35
- obuf_hstl_ii_18.v hdl/spec/sim-old/unisims/obuf_hstl_ii_18.v +0 -35
- obuf_hstl_ii_dci.v hdl/spec/sim-old/unisims/obuf_hstl_ii_dci.v +0 -35
- obuf_hstl_ii_dci_18.v hdl/spec/sim-old/unisims/obuf_hstl_ii_dci_18.v +0 -35
- obuf_hstl_iii.v hdl/spec/sim-old/unisims/obuf_hstl_iii.v +0 -35
- obuf_hstl_iii_18.v hdl/spec/sim-old/unisims/obuf_hstl_iii_18.v +0 -35
- obuf_hstl_iii_dci.v hdl/spec/sim-old/unisims/obuf_hstl_iii_dci.v +0 -35
- obuf_hstl_iii_dci_18.v hdl/spec/sim-old/unisims/obuf_hstl_iii_dci_18.v +0 -35
- obuf_hstl_iv.v hdl/spec/sim-old/unisims/obuf_hstl_iv.v +0 -35
- obuf_hstl_iv_18.v hdl/spec/sim-old/unisims/obuf_hstl_iv_18.v +0 -35
- obuf_hstl_iv_dci.v hdl/spec/sim-old/unisims/obuf_hstl_iv_dci.v +0 -35
- obuf_hstl_iv_dci_18.v hdl/spec/sim-old/unisims/obuf_hstl_iv_dci_18.v +0 -35
- obuf_lvcmos12.v hdl/spec/sim-old/unisims/obuf_lvcmos12.v +0 -35
- obuf_lvcmos12_f_2.v hdl/spec/sim-old/unisims/obuf_lvcmos12_f_2.v +0 -35
- obuf_lvcmos12_f_4.v hdl/spec/sim-old/unisims/obuf_lvcmos12_f_4.v +0 -35
- obuf_lvcmos12_f_6.v hdl/spec/sim-old/unisims/obuf_lvcmos12_f_6.v +0 -35
- obuf_lvcmos12_f_8.v hdl/spec/sim-old/unisims/obuf_lvcmos12_f_8.v +0 -35
- obuf_lvcmos12_s_2.v hdl/spec/sim-old/unisims/obuf_lvcmos12_s_2.v +0 -35
- obuf_lvcmos12_s_4.v hdl/spec/sim-old/unisims/obuf_lvcmos12_s_4.v +0 -35
- obuf_lvcmos12_s_6.v hdl/spec/sim-old/unisims/obuf_lvcmos12_s_6.v +0 -35
- obuf_lvcmos12_s_8.v hdl/spec/sim-old/unisims/obuf_lvcmos12_s_8.v +0 -35
- obuf_lvcmos15.v hdl/spec/sim-old/unisims/obuf_lvcmos15.v +0 -35
- obuf_lvcmos15_f_12.v hdl/spec/sim-old/unisims/obuf_lvcmos15_f_12.v +0 -35
- obuf_lvcmos15_f_16.v hdl/spec/sim-old/unisims/obuf_lvcmos15_f_16.v +0 -35
- obuf_lvcmos15_f_2.v hdl/spec/sim-old/unisims/obuf_lvcmos15_f_2.v +0 -35
- obuf_lvcmos15_f_4.v hdl/spec/sim-old/unisims/obuf_lvcmos15_f_4.v +0 -35
- obuf_lvcmos15_f_6.v hdl/spec/sim-old/unisims/obuf_lvcmos15_f_6.v +0 -35
- obuf_lvcmos15_f_8.v hdl/spec/sim-old/unisims/obuf_lvcmos15_f_8.v +0 -35
- obuf_lvcmos15_s_12.v hdl/spec/sim-old/unisims/obuf_lvcmos15_s_12.v +0 -35
- obuf_lvcmos15_s_16.v hdl/spec/sim-old/unisims/obuf_lvcmos15_s_16.v +0 -35
- obuf_lvcmos15_s_2.v hdl/spec/sim-old/unisims/obuf_lvcmos15_s_2.v +0 -35
- obuf_lvcmos15_s_4.v hdl/spec/sim-old/unisims/obuf_lvcmos15_s_4.v +0 -35
- obuf_lvcmos15_s_6.v hdl/spec/sim-old/unisims/obuf_lvcmos15_s_6.v +0 -35
- obuf_lvcmos15_s_8.v hdl/spec/sim-old/unisims/obuf_lvcmos15_s_8.v +0 -35
- obuf_lvcmos18.v hdl/spec/sim-old/unisims/obuf_lvcmos18.v +0 -35
- obuf_lvcmos18_f_12.v hdl/spec/sim-old/unisims/obuf_lvcmos18_f_12.v +0 -35
- obuf_lvcmos18_f_16.v hdl/spec/sim-old/unisims/obuf_lvcmos18_f_16.v +0 -35
- obuf_lvcmos18_f_2.v hdl/spec/sim-old/unisims/obuf_lvcmos18_f_2.v +0 -35
- obuf_lvcmos18_f_4.v hdl/spec/sim-old/unisims/obuf_lvcmos18_f_4.v +0 -35
- obuf_lvcmos18_f_6.v hdl/spec/sim-old/unisims/obuf_lvcmos18_f_6.v +0 -35
- obuf_lvcmos18_f_8.v hdl/spec/sim-old/unisims/obuf_lvcmos18_f_8.v +0 -35
- obuf_lvcmos18_s_12.v hdl/spec/sim-old/unisims/obuf_lvcmos18_s_12.v +0 -35
- obuf_lvcmos18_s_16.v hdl/spec/sim-old/unisims/obuf_lvcmos18_s_16.v +0 -35
- obuf_lvcmos18_s_2.v hdl/spec/sim-old/unisims/obuf_lvcmos18_s_2.v +0 -35
- obuf_lvcmos18_s_4.v hdl/spec/sim-old/unisims/obuf_lvcmos18_s_4.v +0 -35
- obuf_lvcmos18_s_6.v hdl/spec/sim-old/unisims/obuf_lvcmos18_s_6.v +0 -35
- obuf_lvcmos18_s_8.v hdl/spec/sim-old/unisims/obuf_lvcmos18_s_8.v +0 -35
- obuf_lvcmos2.v hdl/spec/sim-old/unisims/obuf_lvcmos2.v +0 -35
- obuf_lvcmos25.v hdl/spec/sim-old/unisims/obuf_lvcmos25.v +0 -35
- obuf_lvcmos25_f_12.v hdl/spec/sim-old/unisims/obuf_lvcmos25_f_12.v +0 -35
- obuf_lvcmos25_f_16.v hdl/spec/sim-old/unisims/obuf_lvcmos25_f_16.v +0 -35
- obuf_lvcmos25_f_2.v hdl/spec/sim-old/unisims/obuf_lvcmos25_f_2.v +0 -35
- obuf_lvcmos25_f_24.v hdl/spec/sim-old/unisims/obuf_lvcmos25_f_24.v +0 -35
- obuf_lvcmos25_f_4.v hdl/spec/sim-old/unisims/obuf_lvcmos25_f_4.v +0 -35
- obuf_lvcmos25_f_6.v hdl/spec/sim-old/unisims/obuf_lvcmos25_f_6.v +0 -35
- obuf_lvcmos25_f_8.v hdl/spec/sim-old/unisims/obuf_lvcmos25_f_8.v +0 -35
- obuf_lvcmos25_s_12.v hdl/spec/sim-old/unisims/obuf_lvcmos25_s_12.v +0 -35
- obuf_lvcmos25_s_16.v hdl/spec/sim-old/unisims/obuf_lvcmos25_s_16.v +0 -35
- obuf_lvcmos25_s_2.v hdl/spec/sim-old/unisims/obuf_lvcmos25_s_2.v +0 -35
- obuf_lvcmos25_s_24.v hdl/spec/sim-old/unisims/obuf_lvcmos25_s_24.v +0 -35
- obuf_lvcmos25_s_4.v hdl/spec/sim-old/unisims/obuf_lvcmos25_s_4.v +0 -35
- obuf_lvcmos25_s_6.v hdl/spec/sim-old/unisims/obuf_lvcmos25_s_6.v +0 -35
- obuf_lvcmos25_s_8.v hdl/spec/sim-old/unisims/obuf_lvcmos25_s_8.v +0 -35
- obuf_lvcmos33.v hdl/spec/sim-old/unisims/obuf_lvcmos33.v +0 -35
- obuf_lvcmos33_f_12.v hdl/spec/sim-old/unisims/obuf_lvcmos33_f_12.v +0 -35
- obuf_lvcmos33_f_16.v hdl/spec/sim-old/unisims/obuf_lvcmos33_f_16.v +0 -35
- obuf_lvcmos33_f_2.v hdl/spec/sim-old/unisims/obuf_lvcmos33_f_2.v +0 -35
- obuf_lvcmos33_f_24.v hdl/spec/sim-old/unisims/obuf_lvcmos33_f_24.v +0 -35
- obuf_lvcmos33_f_4.v hdl/spec/sim-old/unisims/obuf_lvcmos33_f_4.v +0 -35
- obuf_lvcmos33_f_6.v hdl/spec/sim-old/unisims/obuf_lvcmos33_f_6.v +0 -35
- obuf_lvcmos33_f_8.v hdl/spec/sim-old/unisims/obuf_lvcmos33_f_8.v +0 -35
- obuf_lvcmos33_s_12.v hdl/spec/sim-old/unisims/obuf_lvcmos33_s_12.v +0 -35
- obuf_lvcmos33_s_16.v hdl/spec/sim-old/unisims/obuf_lvcmos33_s_16.v +0 -35
- obuf_lvcmos33_s_2.v hdl/spec/sim-old/unisims/obuf_lvcmos33_s_2.v +0 -35
- obuf_lvcmos33_s_24.v hdl/spec/sim-old/unisims/obuf_lvcmos33_s_24.v +0 -35
- obuf_lvcmos33_s_4.v hdl/spec/sim-old/unisims/obuf_lvcmos33_s_4.v +0 -35
- obuf_lvcmos33_s_6.v hdl/spec/sim-old/unisims/obuf_lvcmos33_s_6.v +0 -35
- obuf_lvcmos33_s_8.v hdl/spec/sim-old/unisims/obuf_lvcmos33_s_8.v +0 -35
- obuf_lvdci_15.v hdl/spec/sim-old/unisims/obuf_lvdci_15.v +0 -35
- obuf_lvdci_18.v hdl/spec/sim-old/unisims/obuf_lvdci_18.v +0 -35
- obuf_lvdci_25.v hdl/spec/sim-old/unisims/obuf_lvdci_25.v +0 -35
- obuf_lvdci_33.v hdl/spec/sim-old/unisims/obuf_lvdci_33.v +0 -35
- obuf_lvdci_dv2_15.v hdl/spec/sim-old/unisims/obuf_lvdci_dv2_15.v +0 -35
- obuf_lvdci_dv2_18.v hdl/spec/sim-old/unisims/obuf_lvdci_dv2_18.v +0 -35
- obuf_lvdci_dv2_25.v hdl/spec/sim-old/unisims/obuf_lvdci_dv2_25.v +0 -35
- obuf_lvdci_dv2_33.v hdl/spec/sim-old/unisims/obuf_lvdci_dv2_33.v +0 -35
- obuf_lvds.v hdl/spec/sim-old/unisims/obuf_lvds.v +0 -35
- obuf_lvpecl.v hdl/spec/sim-old/unisims/obuf_lvpecl.v +0 -35
- obuf_lvttl.v hdl/spec/sim-old/unisims/obuf_lvttl.v +0 -35
- obuf_lvttl_f_12.v hdl/spec/sim-old/unisims/obuf_lvttl_f_12.v +0 -35
- obuf_lvttl_f_16.v hdl/spec/sim-old/unisims/obuf_lvttl_f_16.v +0 -35
- obuf_lvttl_f_2.v hdl/spec/sim-old/unisims/obuf_lvttl_f_2.v +0 -35
- obuf_lvttl_f_24.v hdl/spec/sim-old/unisims/obuf_lvttl_f_24.v +0 -35
- obuf_lvttl_f_4.v hdl/spec/sim-old/unisims/obuf_lvttl_f_4.v +0 -35
- obuf_lvttl_f_6.v hdl/spec/sim-old/unisims/obuf_lvttl_f_6.v +0 -35
- obuf_lvttl_f_8.v hdl/spec/sim-old/unisims/obuf_lvttl_f_8.v +0 -35
- obuf_lvttl_s_12.v hdl/spec/sim-old/unisims/obuf_lvttl_s_12.v +0 -35
- obuf_lvttl_s_16.v hdl/spec/sim-old/unisims/obuf_lvttl_s_16.v +0 -35
- obuf_lvttl_s_2.v hdl/spec/sim-old/unisims/obuf_lvttl_s_2.v +0 -35
- obuf_lvttl_s_24.v hdl/spec/sim-old/unisims/obuf_lvttl_s_24.v +0 -35
- obuf_lvttl_s_4.v hdl/spec/sim-old/unisims/obuf_lvttl_s_4.v +0 -35
- obuf_lvttl_s_6.v hdl/spec/sim-old/unisims/obuf_lvttl_s_6.v +0 -35
- obuf_lvttl_s_8.v hdl/spec/sim-old/unisims/obuf_lvttl_s_8.v +0 -35
- obuf_pci33_3.v hdl/spec/sim-old/unisims/obuf_pci33_3.v +0 -35
- obuf_pci33_5.v hdl/spec/sim-old/unisims/obuf_pci33_5.v +0 -35
- obuf_pci66_3.v hdl/spec/sim-old/unisims/obuf_pci66_3.v +0 -35
- obuf_pcix.v hdl/spec/sim-old/unisims/obuf_pcix.v +0 -35
- obuf_pcix66_3.v hdl/spec/sim-old/unisims/obuf_pcix66_3.v +0 -35
- obuf_s_12.v hdl/spec/sim-old/unisims/obuf_s_12.v +0 -35
- obuf_s_16.v hdl/spec/sim-old/unisims/obuf_s_16.v +0 -35
- obuf_s_2.v hdl/spec/sim-old/unisims/obuf_s_2.v +0 -35
- obuf_s_24.v hdl/spec/sim-old/unisims/obuf_s_24.v +0 -35
- obuf_s_4.v hdl/spec/sim-old/unisims/obuf_s_4.v +0 -35
- obuf_s_6.v hdl/spec/sim-old/unisims/obuf_s_6.v +0 -35
- obuf_s_8.v hdl/spec/sim-old/unisims/obuf_s_8.v +0 -35
- obuf_sstl18_i.v hdl/spec/sim-old/unisims/obuf_sstl18_i.v +0 -35
- obuf_sstl18_i_dci.v hdl/spec/sim-old/unisims/obuf_sstl18_i_dci.v +0 -35
- obuf_sstl18_ii.v hdl/spec/sim-old/unisims/obuf_sstl18_ii.v +0 -35
- obuf_sstl18_ii_dci.v hdl/spec/sim-old/unisims/obuf_sstl18_ii_dci.v +0 -35
- obuf_sstl2_i.v hdl/spec/sim-old/unisims/obuf_sstl2_i.v +0 -35
- obuf_sstl2_i_dci.v hdl/spec/sim-old/unisims/obuf_sstl2_i_dci.v +0 -35
- obuf_sstl2_ii.v hdl/spec/sim-old/unisims/obuf_sstl2_ii.v +0 -35
- obuf_sstl2_ii_dci.v hdl/spec/sim-old/unisims/obuf_sstl2_ii_dci.v +0 -35
- obuf_sstl3_i.v hdl/spec/sim-old/unisims/obuf_sstl3_i.v +0 -35
- obuf_sstl3_i_dci.v hdl/spec/sim-old/unisims/obuf_sstl3_i_dci.v +0 -35
- obuf_sstl3_ii.v hdl/spec/sim-old/unisims/obuf_sstl3_ii.v +0 -35
- obuf_sstl3_ii_dci.v hdl/spec/sim-old/unisims/obuf_sstl3_ii_dci.v +0 -35
- obufds.v hdl/spec/sim-old/unisims/obufds.v +0 -53
- obufds_blvds_25.v hdl/spec/sim-old/unisims/obufds_blvds_25.v +0 -37
- obufds_ldt_25.v hdl/spec/sim-old/unisims/obufds_ldt_25.v +0 -37
- obufds_lvds_25.v hdl/spec/sim-old/unisims/obufds_lvds_25.v +0 -37
- obufds_lvds_33.v hdl/spec/sim-old/unisims/obufds_lvds_33.v +0 -37
- obufds_lvdsext_25.v hdl/spec/sim-old/unisims/obufds_lvdsext_25.v +0 -37
- obufds_lvdsext_33.v hdl/spec/sim-old/unisims/obufds_lvdsext_33.v +0 -37
- obufds_lvpecl_25.v hdl/spec/sim-old/unisims/obufds_lvpecl_25.v +0 -37
- obufds_lvpecl_33.v hdl/spec/sim-old/unisims/obufds_lvpecl_33.v +0 -37
- obufds_ulvds_25.v hdl/spec/sim-old/unisims/obufds_ulvds_25.v +0 -37
- obuft.v hdl/spec/sim-old/unisims/obuft.v +0 -57
- obuft_agp.v hdl/spec/sim-old/unisims/obuft_agp.v +0 -39
- obuft_ctt.v hdl/spec/sim-old/unisims/obuft_ctt.v +0 -39
- obuft_f_12.v hdl/spec/sim-old/unisims/obuft_f_12.v +0 -39
- obuft_f_16.v hdl/spec/sim-old/unisims/obuft_f_16.v +0 -39
- obuft_f_2.v hdl/spec/sim-old/unisims/obuft_f_2.v +0 -39
- obuft_f_24.v hdl/spec/sim-old/unisims/obuft_f_24.v +0 -39
- obuft_f_4.v hdl/spec/sim-old/unisims/obuft_f_4.v +0 -39
- obuft_f_6.v hdl/spec/sim-old/unisims/obuft_f_6.v +0 -39
- obuft_f_8.v hdl/spec/sim-old/unisims/obuft_f_8.v +0 -39
- obuft_gtl.v hdl/spec/sim-old/unisims/obuft_gtl.v +0 -39
- obuft_gtl_dci.v hdl/spec/sim-old/unisims/obuft_gtl_dci.v +0 -39
- obuft_gtlp.v hdl/spec/sim-old/unisims/obuft_gtlp.v +0 -39
- obuft_gtlp_dci.v hdl/spec/sim-old/unisims/obuft_gtlp_dci.v +0 -39
- obuft_hstl_i.v hdl/spec/sim-old/unisims/obuft_hstl_i.v +0 -39
- obuft_hstl_i_18.v hdl/spec/sim-old/unisims/obuft_hstl_i_18.v +0 -39
- obuft_hstl_i_dci.v hdl/spec/sim-old/unisims/obuft_hstl_i_dci.v +0 -39
- obuft_hstl_i_dci_18.v hdl/spec/sim-old/unisims/obuft_hstl_i_dci_18.v +0 -39
- obuft_hstl_ii.v hdl/spec/sim-old/unisims/obuft_hstl_ii.v +0 -39
- obuft_hstl_ii_18.v hdl/spec/sim-old/unisims/obuft_hstl_ii_18.v +0 -39
- obuft_hstl_ii_dci.v hdl/spec/sim-old/unisims/obuft_hstl_ii_dci.v +0 -39
- obuft_hstl_ii_dci_18.v hdl/spec/sim-old/unisims/obuft_hstl_ii_dci_18.v +0 -39
- No files found.
Too many changes to show.
To preserve performance only 1000 of 1000+ files are displayed.
This diff is collapsed.
This diff is collapsed.
Manifest.py
0 → 100644
distribution/.gitignore
0 → 100644
distribution/Makefile
0 → 100644
distribution/dkms.conf
0 → 100644
doc/.gitignore
0 → 100644
doc/Makefile
0 → 100644
doc/conf.py
0 → 100644