Commit 39c6ddbe authored by Federico Vaga's avatar Federico Vaga

Merge branch '15-integrare-rest-cheby-file-into-documentation' into 'master'

Resolve "integrare rest cheby file into documentation"

Closes #15

See merge request be-cem-edl/fec/hardware-modules/fmc-adc-100m14b4cha!4
parents 80df3e5d 86c8bdcc
......@@ -76,6 +76,7 @@ hdl/svec/sim/testbench/top/work/
doc/manual/fmcadc100m14b4cha_gateware_manual.info
doc/manual/fmcadc100m14b4cha_gateware_manual.pdf
doc/manual/fmcadc100m14b4cha_gateware_manual.txt
doc/gateware/regs/*.rst
*.texi
*.aux
*.log
......
......@@ -31,8 +31,6 @@ author = 'Matthieu Cattin, Dimitris Lampridis <dimitrios.lampridis@cern.ch>, Fed
# source_suffix = ['.rst', '.md']
source_suffix = '.rst'
# The master toctree document.
master_doc = 'index'
# -- General configuration ---------------------------------------------------
......@@ -48,10 +46,13 @@ extensions = ['sphinx.ext.autodoc',
# Add any paths that contain templates here, relative to this directory.
templates_path = ['_templates']
# The root document.
master_doc = 'index'
# List of patterns, relative to source directory, that match files and
# directories to ignore when looking for source files.
# This pattern also affects html_static_path and html_extra_path.
exclude_patterns = ['build_env', '_build', 'Thumbs.db', '.DS_Store']
exclude_patterns = ['_build', 'Thumbs.db', '.DS_Store']
# -- Options for HTML output -------------------------------------------------
......
......@@ -9,14 +9,7 @@ The Memory Map
Following the memory map for the part of the ADC design that drives
the FMC ADC 100M modules.
.. only:: latex
.. warning::
Unfortunatelly we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html
:file: regs/fmc_adc_mezzanine_mmap.htm
.. include:: regs/fmc_adc_mezzanine_mmap.rst
Supported Designs
=================
......
......@@ -4,32 +4,31 @@
TOP_DIR = ../../..
HTML := spec_base_regs.htm
HTML += svec_base_regs.htm
HTML += svec_ref_fmc_adc_100Ms_mmap.htm
HTML += spec_ref_fmc_adc_100Ms_mmap.htm
HTML += fmc_adc_mezzanine_mmap.htm
FILES := spec_base_regs
FILES += svec_base_regs
FILES += svec_ref_fmc_adc_100Ms_mmap
FILES += spec_ref_fmc_adc_100Ms_mmap
FILES += fmc_adc_mezzanine_mmap
all: $(HTML)
.PHONY: clean
CHEBY ?= cheby
CHEBY_BUILD=(cd $(dir $<); cheby -i $(notdir $<) --gen-doc --doc html) > $@
all: html rest
fmc_adc_mezzanine_mmap.htm: $(TOP_DIR)/hdl/cheby/fmc_adc_mezzanine_mmap.cheby
$(CHEBY_BUILD)
html : $(addsuffix .htm, $(FILES))
rest : $(addsuffix .rst, $(FILES))
spec_ref_fmc_adc_100Ms_mmap.htm: $(TOP_DIR)/hdl/cheby/spec_ref_fmc_adc_100Ms_mmap.cheby
$(CHEBY_BUILD)
.PHONY: clean html rest
svec_ref_fmc_adc_100Ms_mmap.htm: $(TOP_DIR)/hdl/cheby/svec_ref_fmc_adc_100Ms_mmap.cheby
$(CHEBY_BUILD)
vpath %.cheby $(TOP_DIR)/hdl/cheby/
vpath %.cheby $(TOP_DIR)/hdl/ip_cores/spec/hdl/rtl/
vpath %.cheby $(TOP_DIR)/hdl/ip_cores/svec/hdl/rtl/
svec_base_regs.htm: $(TOP_DIR)/hdl/ip_cores/svec/hdl/rtl/svec_base_regs.cheby
$(CHEBY_BUILD)
%.htm: %.cheby
$(CHEBY) -i $< --gen-doc --doc html > $@
spec_base_regs.htm: $(TOP_DIR)/hdl/ip_cores/spec/hdl/rtl/spec_base_regs.cheby
$(CHEBY_BUILD)
%.rst: %.cheby
$(CHEBY) -i $< --gen-doc --doc rest > $@
clean:
@rm -f *.md *.rst *.htm
......@@ -12,11 +12,9 @@ designs, and the `FMC-ADC-100M`_ part specific to the FMC-ADC-100M mezzanine.
Carrier
=======
.. raw:: html
:file: regs/spec_base_regs.htm
.. include:: regs/spec_base_regs.rst
FMC-ADC-100M
============
.. raw:: html
:file: regs/spec_ref_fmc_adc_100Ms_mmap.htm
.. include:: regs/spec_ref_fmc_adc_100Ms_mmap.rst
......@@ -12,11 +12,9 @@ designs, and the `FMC-ADC-100M`_ part specific to the FMC-ADC-100M mezzanine.
Carrier
=======
.. raw:: html
:file: regs/svec_base_regs.htm
.. include:: regs/svec_base_regs.rst
FMC-ADC-100M
============
.. raw:: html
:file: regs/svec_ref_fmc_adc_100Ms_mmap.htm
.. include:: regs/svec_ref_fmc_adc_100Ms_mmap.rst
......@@ -7,12 +7,14 @@ SIM =../testbench/include
SOURCES = $(wildcard *.cheby)
TARGETS = $(SOURCES:.cheby=.vhd)
CHEBY ?= cheby
all: $(TARGETS)
.PHONY: $(TARGETS)
$(TARGETS): %.vhd : %.cheby
@echo -e "\n\033[34m\033[1m-> Processing file $<\033[0m"
cheby -i $< --gen-hdl=$@
cheby -i $< --gen-consts=$(SIM)/$(@:.vhd=.v)
cheby -i $< --gen-c=../../software/include/hw/$(<:.cheby=.h)
$(CHEBY) -i $< --gen-hdl=$@
$(CHEBY) -i $< --gen-consts=$(SIM)/$(@:.vhd=.v)
$(CHEBY) -i $< --gen-c=../../software/include/hw/$(<:.cheby=.h)
......@@ -9,14 +9,16 @@ SW =../../../software/include/hw
SOURCES = $(wildcard *.cheby)
TARGETS = $(SOURCES:.cheby=.vhd)
CHEBY ?= cheby
all: $(TARGETS)
.PHONY: $(TARGETS)
$(TARGETS): %.vhd : %.cheby
@echo "\n\033[34m\033[1m-> Processing file $<\033[0m"
@cheby -i $< --gen-hdl=$@
@cheby -i $< \
@$(CHEBY) -i $< --gen-hdl=$@
@$(CHEBY) -i $< \
--gen-doc=$(DOC)/$(@:.vhd=.html) \
--gen-consts=$(SIM)/$(@:.vhd=.v) \
--gen-c=$(SW)/$(@:.vhd=.h)
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