# SPDX-FileCopyrightText: 2020 CERN (home.cern)
#
# SPDX-License-Identifier: CC-BY-SA-4.0 OR CERN-OHL-W-2.0+ OR GPL-2.0-or-later

memory-map:
  bus: wb-32-be
  name: aux_trigin
  description: FMC ADC aux trigger out registers
  x-hdl:
    busgroup: True
  children:
  - reg:
     name: version
     description: Core version
     access: ro
     width: 32
     preset: 0xADC10001  # ADC Input 0001
     x-hdl:
        type: const
  - reg:
     name: ctrl
     description: Control register
     access: rw
     width: 32
     children:
       - field:
          name: enable
          description: Enable trigger, cleared when triggered
          range: 0
          x-hdl:
            type: wire
     x-hdl:
        write-strobe: True
  - reg:
     name: seconds
     description: Time (seconds) to trigger
     width: 64
     type: unsigned
     access: rw
  - reg:
     name: cycles
     description: Time (cycles) to trigger
     width: 32
     type: unsigned
     access: rw
