// SPDX-FileCopyrightText: 2020 CERN (home.cern)
//
// SPDX-License-Identifier: CC0-1.0

`define SPEC_CARRIER_CSR_SIZE 16
`define ADDR_SPEC_CARRIER_CSR_CARRIER 'h0
`define SPEC_CARRIER_CSR_CARRIER_PCB_REV_OFFSET 0
`define SPEC_CARRIER_CSR_CARRIER_PCB_REV 'hf
`define SPEC_CARRIER_CSR_CARRIER_RESERVED_OFFSET 4
`define SPEC_CARRIER_CSR_CARRIER_RESERVED 'hfff0
`define SPEC_CARRIER_CSR_CARRIER_TYPE_OFFSET 16
`define SPEC_CARRIER_CSR_CARRIER_TYPE 'hffff0000
`define ADDR_SPEC_CARRIER_CSR_STAT 'h4
`define SPEC_CARRIER_CSR_STAT_FMC_PRES_OFFSET 0
`define SPEC_CARRIER_CSR_STAT_FMC_PRES 'h1
`define SPEC_CARRIER_CSR_STAT_P2L_PLL_LCK_OFFSET 1
`define SPEC_CARRIER_CSR_STAT_P2L_PLL_LCK 'h2
`define SPEC_CARRIER_CSR_STAT_SYS_PLL_LCK_OFFSET 2
`define SPEC_CARRIER_CSR_STAT_SYS_PLL_LCK 'h4
`define SPEC_CARRIER_CSR_STAT_DDR3_CAL_DONE_OFFSET 3
`define SPEC_CARRIER_CSR_STAT_DDR3_CAL_DONE 'h8
`define ADDR_SPEC_CARRIER_CSR_CTRL 'h8
`define SPEC_CARRIER_CSR_CTRL_LED_GREEN_OFFSET 0
`define SPEC_CARRIER_CSR_CTRL_LED_GREEN 'h1
`define SPEC_CARRIER_CSR_CTRL_LED_RED_OFFSET 1
`define SPEC_CARRIER_CSR_CTRL_LED_RED 'h2
`define ADDR_SPEC_CARRIER_CSR_RST 'hc
`define SPEC_CARRIER_CSR_RST_FMC0_OFFSET 0
`define SPEC_CARRIER_CSR_RST_FMC0 'h1
