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FMC ADC 100M 14b 4cha - Testing
Commit 7a2044a6 authored by Matthieu Cattin's avatar Matthieu Cattin
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fmc_adc_spec, carrier_csr: Remove bitstream_type/_date registers from carrier csr.

parent 1f2db46d
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Showing with 11 additions and 25 deletions
test/fmcadc100m14b4cha/python/carrier_csr.py
View file @ 7a2044a6
......@@ -14,17 +14,13 @@ CARRIER_CSR=['Carrier control and status registers',{
'PCB_REV':[0, 'PCB revision', 0xF],
'RESERVED':[4, 'Reserved', 0xFFF],
'TYPE':[16, 'Carrier type', 0xFFFF]}],
'BITSTREAM_TYPE':[0x04, 'Bitstream type', {
'BITSTREAM_TYPE':[0, 'Bitstream type', 0xFFFFFFFF]}],
'BITSTREAM_DATE':[0x08, 'Bitstream date', {
'BITSTREAM_DATE':[0, 'Bitstream date', 0xFFFFFFFF]}],
'STAT':[0x0C, 'Status', {
'STAT':[0x04, 'Status', {
'FMC_PRES':[0, 'FMC presence (active low)', 0x1],
'P2L_PLL_LCK':[1, 'P2L PLL locked', 0x1],
'SYS_PLL_LCK':[2, 'System PLL locked', 0x1],
'DDR3_CAL_DONE':[3, 'DDR3 calibration done', 0x1],
'RESERVED':[4, 'Reserved', 0xFFFFFFF]}],
'CTRL':[0x10, 'Control', {
'CTRL':[0x08, 'Control', {
'LED_GREEN':[0, 'Green LED', 0x1],
'LED_RED':[1, 'Red LED', 0x1],
'DAC_CLR_N':[2, 'VCXO DAC clear (active low)', 0x1],
......
test/fmcadc100m14b4cha/python/fmc_adc_spec.py
View file @ 7a2044a6
......@@ -80,12 +80,16 @@ class CFmcAdc100mSpec:
# Get physical addresses of the pages for DMA transfer
self.dma_pages = self.gnum.get_physical_addr()
# Check if the expected bitstream loaded
bs = self.get_bitstream_type()
if(bs == 0xFFFFFFFF):
# Check if bitstream is properly loaded by reading a register
ct = self.get_carrier_type()
if(ct == 0xFFFFFFFF):
raise FmcAdc100mSpecOperationError("Bitstream not properly loaded.")
if(bs != bs_type):
raise FmcAdc100mSpecOperationError("Wrong bitsream. Excpect:0x%08X, Read:0x%08X" % (bs_type, bs))
# TODO
# Check if the expected bitstream loaded
#bs = self.get_bitstream_type()
#if(bs != bs_type):
# raise FmcAdc100mSpecOperationError("Wrong bitsream. Excpect:0x%08X, Read:0x%08X" % (bs_type, bs))
# Ckeck if a mezzanine is present
if(not self.get_fmc_presence()):
......@@ -113,20 +117,6 @@ class CFmcAdc100mSpec:
except CSRDeviceOperationError as e:
raise FmcAdc100mSpecOperationError(e)
# Get Bitstream type
def get_bitstream_type(self):
try:
return self.csr.get_reg('BITSTREAM_TYPE')
except CSRDeviceOperationError as e:
raise FmcAdc100mSpecOperationError(e)
# Get Bitstream date
def get_bitstream_date(self):
try:
return self.csr.get_reg('BITSTREAM_DATE')
except CSRDeviceOperationError as e:
raise FmcAdc100mSpecOperationError(e)
# Get status register value
def get_status(self):
try:
......
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