Commit 50ea2758 authored by Matthieu Cattin's avatar Matthieu Cattin

fmc_adc, many tests: Add sdb to fmc_adc class, use csr class for timetags…

fmc_adc, many tests: Add sdb to fmc_adc class, use csr class for timetags reading, change trigger position to byte address (was sample address).
parent 05d76879
......@@ -16,6 +16,7 @@ import random
# Import specific modules
#import rr
from sdb import *
from csr import *
from onewire import *
from i2c import *
......@@ -69,6 +70,8 @@ class CFmcAdc100m:
#------------------------------------
# offsets from mezzanine + adc core base address
SDB_ADDR = 0x0
FMC_SYS_I2C_ADDR = 0x1000
EEPROM_ADDR = 0x50
......@@ -83,13 +86,6 @@ class CFmcAdc100m:
FMC_ONEWIRE_ADDR = 0x1400
# UTC core
# tag = [wb_addr_offset, meta, second, coarse, fine]
tag_trig = [0x8, 0, 0, 0, 0]
tag_start = [0x18, 0, 0, 0, 0]
tag_stop = [0x28, 0, 0, 0, 0]
tag_end = [0x38, 0, 0, 0, 0]
# ADC core CSR
FSM_CMD_START = 0x1
FSM_CMD_STOP = 0x2
......@@ -120,19 +116,19 @@ class CFmcAdc100m:
self.DDR_ADR_ADDR = self.adc_mezz_offset + self.DDR_ADR_ADDR
try:
# Objects declaration
# Mezzanine objects declaration
self.fmc_eic = CCSR(self.bus, self.adc_mezz_offset + self.FMC_EIC_ADDR, FMC_ADC_EIC_REGS)
self.utc_core = CCSR(self.bus, self.adc_mezz_offset + self.UTC_CORE_ADDR, UTC_CORE_REGS)
# ADC core objects declaration
self.sdb_csr = CCSR(self.bus, self.adc_core_offset + self.SDB_ADDR)
self.sdb = CSDB(self.sdb_csr)
self.fmc_sys_i2c = COpenCoresI2C(self.bus, self.adc_core_offset + self.FMC_SYS_I2C_ADDR, 249)
self.fmc_i2c = COpenCoresI2C(self.bus, self.adc_core_offset + self.FMC_I2C_ADDR, 249)
self.eeprom_24aa64 = C24AA64(self.fmc_sys_i2c, self.adc_core_offset + self.EEPROM_ADDR)
self.si570 = CSi57x(self.fmc_i2c, self.adc_core_offset + self.SI570_ADDR)
self.fmc_onewire = COpenCoresOneWire(self.bus, self.adc_core_offset + self.FMC_ONEWIRE_ADDR, 624, 124)
self.ds18b20 = CDS18B20(self.fmc_onewire, 0)
self.fmc_spi = COpenCoresSPI(self.bus, self.adc_core_offset + self.FMC_SPI_ADDR, self.FMC_SPI_DIV)
self.adc_cfg = CLTC217x(self.fmc_spi, self.FMC_SPI_SS['ADC'])
self.dac_ch = []
......@@ -140,9 +136,9 @@ class CFmcAdc100m:
self.dac_ch.append(CMAX5442(self.fmc_spi, self.FMC_SPI_SS['DAC2']))
self.dac_ch.append(CMAX5442(self.fmc_spi, self.FMC_SPI_SS['DAC3']))
self.dac_ch.append(CMAX5442(self.fmc_spi, self.FMC_SPI_SS['DAC4']))
self.fmc_adc_csr = CCSR(self.bus, self.adc_core_offset + self.FMC_CSR_ADDR, FMCADC100M_CSR)
# Set channels gain to 1
self.fmc_adc_csr.set_field('CH1_GAIN', 'VAL', 0x8000)
self.fmc_adc_csr.set_field('CH2_GAIN', 'VAL', 0x8000)
......@@ -212,6 +208,15 @@ class CFmcAdc100m:
print("Test pattern : %.4X") % self.adc_cfg.get_testpat()
print("Test pattern status : %.1X") % self.adc_cfg.get_testpat_stat()
#======================================================================
# SDB records
# Dump SDB records
def sdb_dump(self):
self.sdb.dump()
#======================================================================
# FMC-ADC Enhanced Interrupt Controller (EIC)
......@@ -345,71 +350,39 @@ class CFmcAdc100m:
# Returns last trigger event time-tag
def get_utc_trig_tag(self):
# Get metadata
addr = self.tag_trig[0]
self.tag_trig[1] = self.utc_core.rd_reg(addr)
# Get seconds
addr = self.tag_trig[0]+0x4
self.tag_trig[2] = self.utc_core.rd_reg(addr)
# Get coarse
addr = self.tag_trig[0]+0x8
self.tag_trig[3] = self.utc_core.rd_reg(addr)
# Get fine
addr = self.tag_trig[0]+0xc
self.tag_trig[4] = self.utc_core.rd_reg(addr)
return self.tag_trig
tag = []
tag.append(self.utc_core.get_reg('TRIG_TAG_META'))
tag.append(self.utc_core.get_reg('TRIG_TAG_SECONDS'))
tag.append(self.utc_core.get_reg('TRIG_TAG_COARSE'))
tag.append(self.utc_core.get_reg('TRIG_TAG_FINE'))
return tag
# Returns last acquisition start event time-tag
def get_utc_start_tag(self):
# Get metadata
addr = self.tag_start[0]
self.tag_start[1] = self.utc_core.rd_reg(addr)
# Get seconds
addr = self.tag_start[0]+0x4
self.tag_start[2] = self.utc_core.rd_reg(addr)
# Get coarse
addr = self.tag_start[0]+0x8
self.tag_start[3] = self.utc_core.rd_reg(addr)
# Get fine
addr = self.tag_start[0]+0xc
self.tag_start[4] = self.utc_core.rd_reg(addr)
return self.tag_start
tag = []
tag.append(self.utc_core.get_reg('ACQ_START_TAG_META'))
tag.append(self.utc_core.get_reg('ACQ_START_TAG_SECONDS'))
tag.append(self.utc_core.get_reg('ACQ_START_TAG_COARSE'))
tag.append(self.utc_core.get_reg('ACQ_START_TAG_FINE'))
return tag
# Returns last acquisition stop event time-tag
def get_utc_stop_tag(self):
# Get metadata
addr = self.tag_stop[0]
self.tag_stop[1] = self.utc_core.rd_reg(addr)
# Get seconds
addr = self.tag_stop[0]+0x4
self.tag_stop[2] = self.utc_core.rd_reg(addr)
# Get coarse
addr = self.tag_stop[0]+0x8
self.tag_stop[3] = self.utc_core.rd_reg(addr)
# Get fine
addr = self.tag_stop[0]+0xc
self.tag_stop[4] = self.utc_core.rd_reg(addr)
return self.tag_stop
tag = []
tag.append(self.utc_core.get_reg('ACQ_STOP_TAG_META'))
tag.append(self.utc_core.get_reg('ACQ_STOP_TAG_SECONDS'))
tag.append(self.utc_core.get_reg('ACQ_STOP_TAG_COARSE'))
tag.append(self.utc_core.get_reg('ACQ_STOP_TAG_FINE'))
return tag
# Returns last acquisition end event time-tag
def get_utc_end_tag(self):
# Get metadata
addr = self.tag_end[0]
self.tag_end[1] = self.utc_core.rd_reg(addr)
# Get seconds
addr = self.tag_end[0]+0x4
self.tag_end[2] = self.utc_core.rd_reg(addr)
# Get coarse
addr = self.tag_end[0]+0x8
self.tag_end[3] = self.utc_core.rd_reg(addr)
# Get fine
addr = self.tag_end[0]+0xc
self.tag_end[4] = self.utc_core.rd_reg(addr)
return self.tag_end
tag = []
tag.append(self.utc_core.get_reg('ACQ_END_TAG_META'))
tag.append(self.utc_core.get_reg('ACQ_END_TAG_SECONDS'))
tag.append(self.utc_core.get_reg('ACQ_END_TAG_COARSE'))
tag.append(self.utc_core.get_reg('ACQ_END_TAG_FINE'))
return tag
###########################################################################
......@@ -1032,9 +1005,9 @@ class CFmcAdc100m:
# Read ACQ_LENGTH samples after the trigger for all channels
trig_pos = self.get_trig_pos()
if carrier_type == 'spec':
channels_data = self.get_data((trig_pos<<3), acq_length*8)
channels_data = self.get_data(trig_pos, acq_length*8)
elif carrier_type == 'svec':
channels_data = self.get_data((trig_pos<<3), acq_length*8)
channels_data = self.get_data(trig_pos, acq_length*8)
else:
raise FmcAdc100mOperationError('Unsupported carrier type: %s'%carrier_type)
#print [hex(val) for val in channels_data[0::4][:10]]
......
......@@ -80,7 +80,7 @@ def acq_plot():
trig_pos = fmc.get_trig_pos()
pre_trig = m.pre_trig_samples.value()
print('Single shot acq')
carrier_addr = ((trig_pos-pre_trig+1)<<3)
carrier_addr = (trig_pos-pre_trig)
print('trig_pos:%.8X (%d) pre_trig:%.8X (%d)')%(trig_pos, trig_pos, pre_trig, pre_trig)
print('carrier addr: %.8X (%d)')%(carrier_addr, carrier_addr)
channels_data = carrier.get_data(carrier_addr, (NB_POINTS*8))
......@@ -198,10 +198,10 @@ def poll_timer_cb():
start_tag = fmc.get_utc_start_tag()
stop_tag = fmc.get_utc_stop_tag()
end_tag = fmc.get_utc_end_tag()
trig_tag_s = "%09d.%010d s"%(trig_tag[2],(trig_tag[3]*8))
start_tag_s = "%09d.%010d s"%(start_tag[2],(start_tag[3]*8))
stop_tag_s = "%09d.%010d s"%(stop_tag[2],(stop_tag[3]*8))
end_tag_s = "%09d.%010d s"%(end_tag[2],(end_tag[3]*8))
trig_tag_s = "%09d.%010d s"%(trig_tag[1],(trig_tag[2]*8))
start_tag_s = "%09d.%010d s"%(start_tag[1],(start_tag[2]*8))
stop_tag_s = "%09d.%010d s"%(stop_tag[1],(stop_tag[2]*8))
end_tag_s = "%09d.%010d s"%(end_tag[1],(end_tag[2]*8))
m.trig_tag.setText(trig_tag_s)
m.start_tag.setText(start_tag_s)
m.stop_tag.setText(stop_tag_s)
......
......@@ -153,10 +153,10 @@ def main (default_directory='.'):
start_tag = fmc[i].get_utc_start_tag()
stop_tag = fmc[i].get_utc_stop_tag()
end_tag = fmc[i].get_utc_end_tag()
print('Acq stop time-tag : %10.10f [s]')%(stop_tag[2]+(stop_tag[3]*8E-9))
print('Acq start time-tag : %10.10f [s]')%(start_tag[2]+(start_tag[3]*8E-9))
print('Trigger time-tag : %10.10f [s]')%(trig_tag[2]+(trig_tag[3]*8E-9))
print('Acq end time-tag : %10.10f [s]')%(end_tag[2]+(end_tag[3]*8E-9))
print('Acq stop time-tag : %10.10f [s]')%(stop_tag[1]+(stop_tag[2]*8E-9))
print('Acq start time-tag : %10.10f [s]')%(start_tag[1]+(start_tag[2]*8E-9))
print('Trigger time-tag : %10.10f [s]')%(trig_tag[1]+(trig_tag[2]*8E-9))
print('Acq end time-tag : %10.10f [s]')%(end_tag[1]+(end_tag[2]*8E-9))
fmc[i].print_utc_core_regs()
......
......@@ -101,7 +101,7 @@ def acq_channels(fmc, carrier, adc_fs, pause):
# Enable "DMA done" iinterrupt
carrier.set_irq_en_mask(0x1)
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = fmc.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = fmc.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" iinterrupt
carrier.set_irq_en_mask(0x0)
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -96,7 +96,7 @@ def acq_channels(fmc, carrier):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8, False)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8, False)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -100,7 +100,7 @@ def get_channels_mean(fmc, carrier):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8, False)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8, False)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -144,7 +144,7 @@ def acq_channels(fmc, carrier):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -33,7 +33,7 @@ from PAGE.SineWaveform import *
"""
test12: Takes an aqcuisition of all channels and print it to a file and on the screen
test12: Takes an acquisition of each channels separately and print it to a file and on the screen
Set UTC and read UTC time-tags
Note: Requires test00.py to run first to load the firmware!
......@@ -49,10 +49,11 @@ BOX_SET_SLEEP = 0.01
ACQ_TIMEOUT = 10
PRE_TRIG_SAMPLES = 10
POST_TRIG_SAMPLES = 10000
POST_TRIG_SAMPLES = 100
NB_SHOTS = 1
BYTES_PER_SAMPLE = 2
ACQ_LENGTH = 10000 # in samples
TRIG_TIMETAG_BYTES = 16
def open_all_channels(fmc):
......@@ -106,13 +107,20 @@ def acq_channels(fmc, carrier, adc_fs, pause):
trig_pos = fmc.get_trig_pos()
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
# Read samples for all channels + trigger timetag
data_length = ((PRE_TRIG_SAMPLES + 1 + POST_TRIG_SAMPLES) * NB_CHANNELS * BYTES_PER_SAMPLE) + TRIG_TIMETAG_BYTES
channels_data = carrier.get_data((trig_pos-(PRE_TRIG_SAMPLES*8)), data_length)
trig_timetag = []
data = []
for i in range(8):
data.append(channels_data.pop(-1))
for i in range(0,8,2):
trig_timetag.append(((data[i] << 16) + data[i+1]))
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
channels_data = [digital2volt(item,adc_fs,16) for item in channels_data]
return channels_data
return channels_data, trig_timetag
def plot_channels(ch_data, ch_mean, ylimit):
sample = arange(len(ch_data[0]))
......@@ -240,17 +248,21 @@ def main (default_directory='.'):
box.select_output_ch(ch+1)
time.sleep(BOX_SET_SLEEP)
# Perform an acquisition
acq_data = acq_channels(fmc, carrier, ADC_FS[IN_RANGE], ACQ_PAUSE)
acq_data, trig_timetag = acq_channels(fmc, carrier, ADC_FS[IN_RANGE], ACQ_PAUSE)
channels_data[ch] = acq_data[ch::4]
print("Number of samples: %d"%(len(channels_data[ch])))
# Get time-tags
trig_tag = fmc.get_utc_trig_tag()
start_tag = fmc.get_utc_start_tag()
stop_tag = fmc.get_utc_stop_tag()
end_tag = fmc.get_utc_end_tag()
print('Acq stop time-tag : %10.10f [s]')%(stop_tag[2]+(stop_tag[3]*8E-9))
print('Acq start time-tag : %10.10f [s]')%(start_tag[2]+(start_tag[3]*8E-9))
print('Trigger time-tag : %10.10f [s]')%(trig_tag[2]+(trig_tag[3]*8E-9))
print('Acq end time-tag : %10.10f [s]')%(end_tag[2]+(end_tag[3]*8E-9))
print('Acq stop time-tag : %10.10f [s]')%(stop_tag[1]+(stop_tag[2]*8E-9))
print('Acq start time-tag : %10.10f [s]')%(start_tag[1]+(start_tag[2]*8E-9))
print('Trigger time-tag : %10.10f [s]')%(trig_tag[1]+(trig_tag[2]*8E-9))
print('Acq end time-tag : %10.10f [s]')%(end_tag[1]+(end_tag[2]*8E-9))
print('Trigger time-tag (from reg) meta: 0x%08X seconds: 0x%08X coarse: 0x%08X fine: 0x%08X'%(trig_tag[0], trig_tag[1], trig_tag[2], trig_tag[3]))
print('Trigger time-tag (from data) meta: 0x%08X seconds: 0x%08X coarse: 0x%08X fine: 0x%08X'%(trig_timetag[3], trig_timetag[2], trig_timetag[1], trig_timetag[0]))
fmc.print_utc_core_regs()
......
......@@ -221,10 +221,10 @@ def main (default_directory='.'):
print start_tag
print stop_tag
print end_tag
print('Trigger time-tag : %10.10f [s]')%(trig_tag[2]+(trig_tag[3]*8E-9))
print('Acq start time-tag : %10.10f [s]')%(start_tag[2]+(start_tag[3]*8E-9))
print('Acq stop time-tag : %10.10f [s]')%(stop_tag[2]+(stop_tag[3]*8E-9))
print('Acq end time-tag : %10.10f [s]')%(end_tag[2]+(end_tag[3]*8E-9))
print('Trigger time-tag : %10.10f [s]')%(trig_tag[1]+(trig_tag[2]*8E-9))
print('Acq start time-tag : %10.10f [s]')%(start_tag[1]+(start_tag[2]*8E-9))
print('Acq stop time-tag : %10.10f [s]')%(stop_tag[1]+(stop_tag[2]*8E-9))
print('Acq end time-tag : %10.10f [s]')%(end_tag[1]+(end_tag[2]*8E-9))
# print aqcuisition to file
# open test09 log file in read mode
......
......@@ -149,7 +149,7 @@ def acq_get_data(spec_fmc, fmc, adc_fs, adc_nbits=16):
# Enable "DMA done" interrupt
spec_fmc.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = spec_fmc.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = spec_fmc.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
spec_fmc.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......@@ -337,10 +337,10 @@ def main (default_directory='.'):
start_tag = fmc.get_utc_start_tag()
stop_tag = fmc.get_utc_stop_tag()
end_tag = fmc.get_utc_end_tag()
print "Trigger time-tag : %10.10f [s]"%(trig_tag[2]+(trig_tag[3]*8E-9))
print "Acq start time-tag : %10.10f [s]"%(start_tag[2]+(start_tag[3]*8E-9))
print "Acq stop time-tag : %10.10f [s]"%(stop_tag[2]+(stop_tag[3]*8E-9))
print "Acq end time-tag : %10.10f [s]"%(end_tag[2]+(end_tag[3]*8E-9))
print "Trigger time-tag : %10.10f [s]"%(trig_tag[1]+(trig_tag[2]*8E-9))
print "Acq start time-tag : %10.10f [s]"%(start_tag[1]+(start_tag[2]*8E-9))
print "Acq stop time-tag : %10.10f [s]"%(stop_tag[1]+(stop_tag[2]*8E-9))
print "Acq end time-tag : %10.10f [s]"%(end_tag[1]+(end_tag[2]*8E-9))
"""
# print aqcuisition to file
......
......@@ -120,7 +120,7 @@ def acq_channels(fmc, spec_fmc):
# Enable "DMA done" interrupt
spec_fmc.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = spec_fmc.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = spec_fmc.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
spec_fmc.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -124,7 +124,7 @@ def acquisition_all(fmc, spec_fmc):
# Retrieve data trough DMA
trig_pos = fmc.get_trig_pos()
print('Trigger position; 0x%X')%(trig_pos)
channels_data = spec_fmc.get_data(((trig_pos-PRE_TRIG_SAMPLES)<<3), (PRE_TRIG_SAMPLES+POST_TRIG_SAMPLES)*8)
channels_data = spec_fmc.get_data((trig_pos-(PRE_TRIG_SAMPLES*8)), (PRE_TRIG_SAMPLES+POST_TRIG_SAMPLES)*8)
return channels_data
......
......@@ -194,7 +194,7 @@ def acq_channel(carrier, fmc, ch, adc_fs, adc_nbits=16, pause=0.01):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -168,7 +168,7 @@ def acq_channel(carrier, fmc, ch, adc_fs, adc_nbits=16, pause=0.01):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -94,7 +94,7 @@ def acq_channels(fmc, carrier):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
return 0
......
......@@ -177,7 +177,7 @@ def acq_channel(carrier, fmc, ch, adc_fs, adc_nbits=16, pause=0.01):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -99,7 +99,7 @@ def acq_channels(fmc, carrier):
#carrier.print_irq_controller_regs()
raw_input("hit any key to start dma.")
# Read ACQ_LENGTH samples after the trigger for all channels
#channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
#channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8)
channels_data = carrier.get_data(0, ACQ_LENGTH*8)
#for carrier_addr in range(0,10*4096, 4096):
# channels_data = carrier.get_data(carrier_addr, 0x1000)
......
......@@ -426,7 +426,7 @@ def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, ve
# Single shot case
#-----------------------------------------------------------------------
# Get trigger position (in samples)
trig_pos = fmc.get_trig_pos()
trig_pos = fmc.get_trig_pos()/8
# Compute acquisition start address (in samples)
if pre_trig_samples > trig_pos:
......
......@@ -106,7 +106,7 @@ def acq_channels(fmc, carrier, adc_fs, pause):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
......@@ -117,7 +117,7 @@ def acq_channels(fmc, carrier, adc_fs, pause):
# Enable "DMA done" interrupt
carrier.enable_dma_done_irq()
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data = carrier.get_data((trig_pos<<3), ACQ_LENGTH*8)
channels_data = carrier.get_data(trig_pos, ACQ_LENGTH*8)
# Disable "DMA done" interrupt
carrier.disable_dma_done_irq()
channels_data = [hex2signed(item) for item in channels_data]
......
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