• Mount a Low Pin Count (LCP) connector instead of a High Pin Count (HPC). This will ease assembly and notably will make a visual check of the soldering of the relevant signals possible.
  • Keep the layout the same, so that in special applications still a HPC can be mounted. Note that in that case also two capacitors must be moved to select this external clock.
  • May be a EDA-02063-V5-1 as the PCB will stay the same.

Background

The HPC part of the connector is uniquely used when feeding an external clock signal to the FMC mezzanine. However, this possibility has not been used in CERN's applications. In case the sampling needs to be synchronous to an external clock, it will be possible to synchronise the local Si570 oscillator to this external clock by the controlling FPGA on the carrier card.

Therefore the external clock signal will never be fed to the mezzanine card and the use of the HPC connector is superfluous. During the first series production we have seen assembly problems on the outer row of the HPC connector that could not be detected by the test program as they are not used. The inner pins are not visible as they are hidden by two rows of these unused signals.