- 20 Apr, 2016 1 commit
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Dimitris Lampridis authored
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- 19 Apr, 2016 1 commit
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Dimitris Lampridis authored
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- 18 Apr, 2016 2 commits
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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- 30 Mar, 2016 1 commit
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Dimitris Lampridis authored
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- 20 Aug, 2014 1 commit
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Matthieu Cattin authored
The sampling frequency can't be changed dynamically in the current design. This is due to the internal fpga pll that is configured for a fixed 400MHz input.
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- 12 May, 2014 1 commit
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Matthieu Cattin authored
- Rename folders with shorter names. - Remove documents un-related to gateware (e.g. board design).
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