- 17 Jul, 2013 18 commits
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
Now the figures dir is common to all doc.
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Matthieu Cattin authored
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- 08 Apr, 2013 1 commit
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Matthieu Cattin authored
In multi-shot mode, this was causing the end_acq not to be generated for single sample acquisitions. Also fix the number of samples taken in multi-shot mode. total = 1 (trigger) + pre_trig + post trig.
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- 28 Mar, 2013 2 commits
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Matthieu Cattin authored
- Reports after synthesis and place+route. - sdb meta-info update in (sdb_meta_pkg.vhd).
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Matthieu Cattin authored
Add file header to sdb_meta_pkg.vhd
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- 27 Mar, 2013 1 commit
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Matthieu Cattin authored
Was setting the interrupt source bits regardless of the interrupt mask. Now a source bit is set only if the corresponding mask bit is set.
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- 18 Mar, 2013 1 commit
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Matthieu Cattin authored
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- 12 Mar, 2013 1 commit
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Matthieu Cattin authored
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- 11 Mar, 2013 6 commits
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Matthieu Cattin authored
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Matthieu Cattin authored
This information is now in sdb header (meta info).
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Matthieu Cattin authored
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Matthieu Cattin authored
SPEC front panel leds reserved for WR. SPEC aux leds used as follow: 0 = fpga programmed (heartbeat) 1 = trigger 2 = acquisition done 3 = dma done
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Matthieu Cattin authored
Was using the wrong fifo empty signal to generate the valid signal.
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Matthieu Cattin authored
Is not recording the rigth amount of samples in the ddr.
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- 08 Mar, 2013 2 commits
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Matthieu Cattin authored
Was using custom coregen fifo and dpram.
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Matthieu Cattin authored
Calibration data storage in eeprom with sdbfs (was ipmi only).
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- 07 Mar, 2013 7 commits
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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- 05 Mar, 2013 1 commit
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Matthieu Cattin authored
no_coregen branch generic_fifo is buggy, not outputing the last written data from time to time. Was causing the gennum core to hang (waiting forever on the last data).
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