Commit c4c3236b authored by Dimitris Lampridis's avatar Dimitris Lampridis

hdl: minor refactoring of SVEC reference design to align it with the SPEC one

parent 19d130b1
#===============================================================================
# The IO Location Constraints
# IO Constraints
#===============================================================================
#----------------------------------------
# VME interface
#----------------------------------------
NET "vme_write_n_i" LOC = R1;
NET "vme_rst_n_i" LOC = P4;
#NET "vme_sysclk_i" LOC = P3;
NET "vme_retry_oe_o" LOC = R4;
NET "vme_retry_n_o" LOC = AB2;
NET "vme_lword_n_b" LOC = M7;
NET "vme_write_n_i" LOC = R1;
NET "vme_rst_n_i" LOC = P4;
NET "vme_retry_oe_o" LOC = R4;
NET "vme_retry_n_o" LOC = AB2;
NET "vme_lword_n_b" LOC = M7;
NET "vme_iackout_n_o" LOC = N3;
NET "vme_iackin_n_i" LOC = P7;
NET "vme_iack_n_i" LOC = N1;
NET "vme_dtack_oe_o" LOC = T1;
NET "vme_dtack_n_o" LOC = R5;
NET "vme_ds_n_i[1]" LOC = Y6;
NET "vme_ds_n_i[0]" LOC = Y7;
NET "vme_iackin_n_i" LOC = P7;
NET "vme_iack_n_i" LOC = N1;
NET "vme_dtack_oe_o" LOC = T1;
NET "vme_dtack_n_o" LOC = R5;
NET "vme_ds_n_i[1]" LOC = Y6;
NET "vme_ds_n_i[0]" LOC = Y7;
NET "vme_data_oe_n_o" LOC = P1;
NET "vme_data_dir_o" LOC = P2;
NET "vme_berr_o" LOC = R3;
NET "vme_as_n_i" LOC = P6;
NET "vme_data_dir_o" LOC = P2;
NET "vme_berr_o" LOC = R3;
NET "vme_as_n_i" LOC = P6;
NET "vme_addr_oe_n_o" LOC = N4;
NET "vme_addr_dir_o" LOC = N5;
NET "vme_irq_o[7]" LOC = R7;
NET "vme_irq_o[6]" LOC = AH2;
NET "vme_irq_o[5]" LOC = AF2;
NET "vme_irq_o[4]" LOC = N9;
NET "vme_irq_o[3]" LOC = N10;
NET "vme_irq_o[2]" LOC = AH4;
NET "vme_irq_o[1]" LOC = AG4;
NET "vme_gap_i" LOC = M6;
NET "vme_ga_i[4]" LOC = V9;
NET "vme_ga_i[3]" LOC = V10;
NET "vme_ga_i[2]" LOC = AJ1;
NET "vme_ga_i[1]" LOC = AH1;
NET "vme_ga_i[0]" LOC = V7;
NET "vme_data_b[31]" LOC = AK3;
NET "vme_data_b[30]" LOC = AH3;
NET "vme_data_b[29]" LOC = T8;
NET "vme_data_b[28]" LOC = T9;
NET "vme_data_b[27]" LOC = AK4;
NET "vme_data_b[26]" LOC = AJ4;
NET "vme_data_b[25]" LOC = W6;
NET "vme_data_b[24]" LOC = W7;
NET "vme_data_b[23]" LOC = AB6;
NET "vme_data_b[22]" LOC = AB7;
NET "vme_data_b[21]" LOC = W9;
NET "vme_data_b[20]" LOC = W10;
NET "vme_data_b[19]" LOC = AK5;
NET "vme_data_b[18]" LOC = AH5;
NET "vme_data_b[17]" LOC = AD6;
NET "vme_data_b[16]" LOC = AC6;
NET "vme_data_b[15]" LOC = AA6;
NET "vme_data_b[14]" LOC = AA7;
NET "vme_data_b[13]" LOC = T6;
NET "vme_data_b[12]" LOC = T7;
NET "vme_data_b[11]" LOC = AG5;
NET "vme_data_b[10]" LOC = AE5;
NET "vme_data_b[9]" LOC = Y11;
NET "vme_data_b[8]" LOC = W11;
NET "vme_data_b[7]" LOC = AF6;
NET "vme_data_b[6]" LOC = AE6;
NET "vme_data_b[5]" LOC = Y8;
NET "vme_data_b[4]" LOC = Y9;
NET "vme_data_b[3]" LOC = AE7;
NET "vme_data_b[2]" LOC = AD7;
NET "vme_data_b[1]" LOC = AA9;
NET "vme_data_b[0]" LOC = AA10;
NET "vme_am_i[5]" LOC = V8;
NET "vme_am_i[4]" LOC = AG3;
NET "vme_am_i[3]" LOC = AF3;
NET "vme_am_i[2]" LOC = AF4;
NET "vme_am_i[1]" LOC = AE4;
NET "vme_am_i[0]" LOC = AK2;
NET "vme_addr_b[31]" LOC = T2;
NET "vme_addr_b[30]" LOC = T3;
NET "vme_addr_b[29]" LOC = T4;
NET "vme_addr_b[28]" LOC = U1;
NET "vme_addr_b[27]" LOC = U3;
NET "vme_addr_b[26]" LOC = U4;
NET "vme_addr_b[25]" LOC = U5;
NET "vme_addr_b[24]" LOC = V1;
NET "vme_addr_b[23]" LOC = V2;
NET "vme_addr_b[22]" LOC = W1;
NET "vme_addr_b[21]" LOC = W3;
NET "vme_addr_b[20]" LOC = AA4;
NET "vme_addr_b[19]" LOC = AA5;
NET "vme_addr_b[18]" LOC = Y1;
NET "vme_addr_b[17]" LOC = Y2;
NET "vme_addr_b[16]" LOC = Y3;
NET "vme_addr_b[15]" LOC = Y4;
NET "vme_addr_b[14]" LOC = AC1;
NET "vme_addr_b[13]" LOC = AC3;
NET "vme_addr_b[12]" LOC = AD1;
NET "vme_addr_b[11]" LOC = AD2;
NET "vme_addr_b[10]" LOC = AB3;
NET "vme_addr_b[9]" LOC = AB4;
NET "vme_addr_b[8]" LOC = AD3;
NET "vme_addr_b[7]" LOC = AD4;
NET "vme_addr_b[6]" LOC = AC4;
NET "vme_addr_b[5]" LOC = AC5;
NET "vme_addr_b[4]" LOC = N7;
NET "vme_addr_b[3]" LOC = N8;
NET "vme_addr_b[2]" LOC = AE1;
NET "vme_addr_b[1]" LOC = AE3;
NET "vme_write_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_rst_n_i" IOSTANDARD = "LVCMOS33";
#NET "vme_sysclk_i" IOSTANDARD = "LVCMOS33";
NET "vme_retry_oe_o" IOSTANDARD = "LVCMOS33";
NET "vme_retry_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_lword_n_b" IOSTANDARD = "LVCMOS33";
NET "vme_addr_dir_o" LOC = N5;
NET "vme_irq_o[7]" LOC = R7;
NET "vme_irq_o[6]" LOC = AH2;
NET "vme_irq_o[5]" LOC = AF2;
NET "vme_irq_o[4]" LOC = N9;
NET "vme_irq_o[3]" LOC = N10;
NET "vme_irq_o[2]" LOC = AH4;
NET "vme_irq_o[1]" LOC = AG4;
NET "vme_gap_i" LOC = M6;
NET "vme_ga_i[4]" LOC = V9;
NET "vme_ga_i[3]" LOC = V10;
NET "vme_ga_i[2]" LOC = AJ1;
NET "vme_ga_i[1]" LOC = AH1;
NET "vme_ga_i[0]" LOC = V7;
NET "vme_data_b[31]" LOC = AK3;
NET "vme_data_b[30]" LOC = AH3;
NET "vme_data_b[29]" LOC = T8;
NET "vme_data_b[28]" LOC = T9;
NET "vme_data_b[27]" LOC = AK4;
NET "vme_data_b[26]" LOC = AJ4;
NET "vme_data_b[25]" LOC = W6;
NET "vme_data_b[24]" LOC = W7;
NET "vme_data_b[23]" LOC = AB6;
NET "vme_data_b[22]" LOC = AB7;
NET "vme_data_b[21]" LOC = W9;
NET "vme_data_b[20]" LOC = W10;
NET "vme_data_b[19]" LOC = AK5;
NET "vme_data_b[18]" LOC = AH5;
NET "vme_data_b[17]" LOC = AD6;
NET "vme_data_b[16]" LOC = AC6;
NET "vme_data_b[15]" LOC = AA6;
NET "vme_data_b[14]" LOC = AA7;
NET "vme_data_b[13]" LOC = T6;
NET "vme_data_b[12]" LOC = T7;
NET "vme_data_b[11]" LOC = AG5;
NET "vme_data_b[10]" LOC = AE5;
NET "vme_data_b[9]" LOC = Y11;
NET "vme_data_b[8]" LOC = W11;
NET "vme_data_b[7]" LOC = AF6;
NET "vme_data_b[6]" LOC = AE6;
NET "vme_data_b[5]" LOC = Y8;
NET "vme_data_b[4]" LOC = Y9;
NET "vme_data_b[3]" LOC = AE7;
NET "vme_data_b[2]" LOC = AD7;
NET "vme_data_b[1]" LOC = AA9;
NET "vme_data_b[0]" LOC = AA10;
NET "vme_am_i[5]" LOC = V8;
NET "vme_am_i[4]" LOC = AG3;
NET "vme_am_i[3]" LOC = AF3;
NET "vme_am_i[2]" LOC = AF4;
NET "vme_am_i[1]" LOC = AE4;
NET "vme_am_i[0]" LOC = AK2;
NET "vme_addr_b[31]" LOC = T2;
NET "vme_addr_b[30]" LOC = T3;
NET "vme_addr_b[29]" LOC = T4;
NET "vme_addr_b[28]" LOC = U1;
NET "vme_addr_b[27]" LOC = U3;
NET "vme_addr_b[26]" LOC = U4;
NET "vme_addr_b[25]" LOC = U5;
NET "vme_addr_b[24]" LOC = V1;
NET "vme_addr_b[23]" LOC = V2;
NET "vme_addr_b[22]" LOC = W1;
NET "vme_addr_b[21]" LOC = W3;
NET "vme_addr_b[20]" LOC = AA4;
NET "vme_addr_b[19]" LOC = AA5;
NET "vme_addr_b[18]" LOC = Y1;
NET "vme_addr_b[17]" LOC = Y2;
NET "vme_addr_b[16]" LOC = Y3;
NET "vme_addr_b[15]" LOC = Y4;
NET "vme_addr_b[14]" LOC = AC1;
NET "vme_addr_b[13]" LOC = AC3;
NET "vme_addr_b[12]" LOC = AD1;
NET "vme_addr_b[11]" LOC = AD2;
NET "vme_addr_b[10]" LOC = AB3;
NET "vme_addr_b[9]" LOC = AB4;
NET "vme_addr_b[8]" LOC = AD3;
NET "vme_addr_b[7]" LOC = AD4;
NET "vme_addr_b[6]" LOC = AC4;
NET "vme_addr_b[5]" LOC = AC5;
NET "vme_addr_b[4]" LOC = N7;
NET "vme_addr_b[3]" LOC = N8;
NET "vme_addr_b[2]" LOC = AE1;
NET "vme_addr_b[1]" LOC = AE3;
NET "vme_write_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_rst_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_retry_oe_o" IOSTANDARD = "LVCMOS33";
NET "vme_retry_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_lword_n_b" IOSTANDARD = "LVCMOS33";
NET "vme_iackout_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_iackin_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_iack_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_dtack_oe_o" IOSTANDARD = "LVCMOS33";
NET "vme_dtack_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_ds_n_i[1]" IOSTANDARD = "LVCMOS33";
NET "vme_ds_n_i[0]" IOSTANDARD = "LVCMOS33";
NET "vme_iackin_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_iack_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_dtack_oe_o" IOSTANDARD = "LVCMOS33";
NET "vme_dtack_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_ds_n_i[*]" IOSTANDARD = "LVCMOS33";
NET "vme_data_oe_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_data_dir_o" IOSTANDARD = "LVCMOS33";
NET "vme_berr_o" IOSTANDARD = "LVCMOS33";
NET "vme_as_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_data_dir_o" IOSTANDARD = "LVCMOS33";
NET "vme_berr_o" IOSTANDARD = "LVCMOS33";
NET "vme_as_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_addr_oe_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_addr_dir_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[7]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[6]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[5]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[4]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[3]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[2]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[1]" IOSTANDARD = "LVCMOS33";
NET "vme_gap_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[4]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[3]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[2]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[1]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[0]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[31]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[30]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[29]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[28]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[27]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[26]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[25]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[24]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[23]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[22]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[21]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[20]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[19]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[18]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[17]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[16]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[15]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[14]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[13]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[12]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[11]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[10]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[9]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[8]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[7]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[6]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[5]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[4]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[3]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[2]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[1]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[0]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[5]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[4]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[3]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[2]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[1]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[0]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[31]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[30]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[29]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[28]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[27]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[26]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[25]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[24]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[23]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[22]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[21]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[20]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[19]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[18]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[17]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[16]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[15]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[14]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[13]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[12]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[11]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[10]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[9]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[8]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[7]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[6]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[5]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[4]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[3]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[2]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[1]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_dir_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[*]" IOSTANDARD = "LVCMOS33";
NET "vme_gap_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[*]" IOSTANDARD = "LVCMOS33";
NET "vme_data_b[*]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[*]" IOSTANDARD = "LVCMOS33";
NET "vme_addr_b[*]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# DDR IO standards and terminations
# DDR Memory
#----------------------------------------
NET "ddr_udqs_p_b[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_udqs_n_b[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ldqs_p_b[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ldqs_n_b[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ck_p_o[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ck_n_o[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_rzq_b[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_we_n_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_udm_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_reset_n_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_ras_n_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_odt_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_ldm_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_cke_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_cas_n_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_ba_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[*]" IN_TERM = NONE;
NET "ddr_ldqs_p_b[*]" IN_TERM = NONE;
NET "ddr_ldqs_n_b[*]" IN_TERM = NONE;
NET "ddr_udqs_p_b[*]" IN_TERM = NONE;
NET "ddr_udqs_n_b[*]" IN_TERM = NONE;
#----------------------------------------
# DDR0 (bank 4)
#----------------------------------------
NET "ddr_rzq_b[0]" LOC = L7;
NET "ddr_we_n_o[0]" LOC = F4;
NET "ddr_udqs_p_b[0]" LOC = K2;
......@@ -290,9 +184,7 @@ NET "ddr_a_o[2]" LOC = A3;
NET "ddr_a_o[1]" LOC = D3;
NET "ddr_a_o[0]" LOC = D4;
#----------------------------------------
# DDR1 (bank 5)
#----------------------------------------
NET "ddr_rzq_b[1]" LOC = G25;
NET "ddr_we_n_o[1]" LOC = E26;
NET "ddr_udqs_p_b[1]" LOC = K28;
......@@ -342,88 +234,116 @@ NET "ddr_a_o[16]" LOC = C30;
NET "ddr_a_o[15]" LOC = D30;
NET "ddr_a_o[14]" LOC = D28;
# DDR IO standards and terminations
NET "ddr_udqs_p_b[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_udqs_n_b[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ldqs_p_b[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ldqs_n_b[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ck_p_o[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ck_n_o[*]" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_rzq_b[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_we_n_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_udm_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_reset_n_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_ras_n_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_odt_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_ldm_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_cke_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_cas_n_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_ba_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[*]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[*]" IN_TERM = NONE;
NET "ddr_ldqs_p_b[*]" IN_TERM = NONE;
NET "ddr_ldqs_n_b[*]" IN_TERM = NONE;
NET "ddr_udqs_p_b[*]" IN_TERM = NONE;
NET "ddr_udqs_n_b[*]" IN_TERM = NONE;
#----------------------------------------
# Clock and reset inputs
#----------------------------------------
NET "rst_n_i" LOC = AD28;
NET "rst_n_i" IOSTANDARD = "LVCMOS33";
NET "clk_20m_vcxo_i" LOC = V26;
NET "rst_n_i" LOC = AD28;
NET "clk_20m_vcxo_i" LOC = V26;
NET "clk_125m_pllref_n_i" LOC = AB30;
NET "clk_125m_pllref_p_i" LOC = AB28;
NET "clk_20m_vcxo_i" IOSTANDARD = "LVCMOS33";
NET "clk_125m_gtp_p_i" LOC = B19;
NET "clk_125m_gtp_n_i" LOC = A19;
NET "rst_n_i" IOSTANDARD = "LVCMOS33";
NET "clk_20m_vcxo_i" IOSTANDARD = "LVCMOS33";
NET "clk_125m_pllref_n_i" IOSTANDARD = "LVDS_25";
NET "clk_125m_pllref_n_i" IOSTANDARD = "LVDS_25";
NET "clk_125m_gtp_p_i" LOC = B19;
NET "clk_125m_gtp_n_i" LOC = A19;
NET "clk_125m_gtp_p_i" IOSTANDARD = "LVDS_25";
NET "clk_125m_gtp_n_i" IOSTANDARD = "LVDS_25";
NET "clk_125m_gtp_p_i" IOSTANDARD = "LVDS_25";
NET "clk_125m_gtp_n_i" IOSTANDARD = "LVDS_25";
#----------------------------------------
# SFP slot
#----------------------------------------
NET "sfp_txp_o" LOC = B23;
NET "sfp_txn_o" LOC = A23;
NET "sfp_rxp_i" LOC = D22;
NET "sfp_rxn_i" LOC = C22;
NET "sfp_los_i" LOC = W25;
NET "sfp_mod_def0_i" LOC = Y26;
NET "sfp_mod_def1_b" LOC = Y27;
NET "sfp_mod_def2_b" LOC = AA24;
NET "sfp_txp_o" LOC = B23;
NET "sfp_txn_o" LOC = A23;
NET "sfp_rxp_i" LOC = D22;
NET "sfp_rxn_i" LOC = C22;
NET "sfp_los_i" LOC = W25;
NET "sfp_mod_def0_i" LOC = Y26;
NET "sfp_mod_def1_b" LOC = Y27;
NET "sfp_mod_def2_b" LOC = AA24;
NET "sfp_rate_select_o" LOC = W24;
NET "sfp_tx_disable_o" LOC = AA25;
NET "sfp_tx_fault_i" LOC = AA27;
NET "sfp_los_i" IOSTANDARD = "LVCMOS33";
NET "sfp_mod_def0_i" IOSTANDARD = "LVCMOS33";
NET "sfp_mod_def1_b" IOSTANDARD = "LVCMOS33";
NET "sfp_mod_def2_b" IOSTANDARD = "LVCMOS33";
NET "sfp_tx_disable_o" LOC = AA25;
NET "sfp_tx_fault_i" LOC = AA27;
NET "sfp_los_i" IOSTANDARD = "LVCMOS33";
NET "sfp_mod_def0_i" IOSTANDARD = "LVCMOS33";
NET "sfp_mod_def1_b" IOSTANDARD = "LVCMOS33";
NET "sfp_mod_def2_b" IOSTANDARD = "LVCMOS33";
NET "sfp_rate_select_o" IOSTANDARD = "LVCMOS33";
NET "sfp_tx_disable_o" IOSTANDARD = "LVCMOS33";
NET "sfp_tx_fault_i" IOSTANDARD = "LVCMOS33";
NET "sfp_tx_disable_o" IOSTANDARD = "LVCMOS33";
NET "sfp_tx_fault_i" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Clock controls
# DAC interfaces (for VCXO)
#----------------------------------------
NET "pll20dac_din_o" LOC = U28;
NET "pll20dac_sclk_o" LOC = AA28;
NET "pll20dac_din_o" LOC = U28;
NET "pll20dac_sclk_o" LOC = AA28;
NET "pll20dac_sync_n_o" LOC = N28;
NET "pll25dac_din_o" LOC = P25;
NET "pll25dac_sclk_o" LOC = N27;
NET "pll25dac_din_o" LOC = P25;
NET "pll25dac_sclk_o" LOC = N27;
NET "pll25dac_sync_n_o" LOC = P26;
NET "pll20dac_din_o" IOSTANDARD = "LVCMOS33";
NET "pll20dac_sclk_o" IOSTANDARD = "LVCMOS33";
NET "pll20dac_din_o" IOSTANDARD = "LVCMOS33";
NET "pll20dac_sclk_o" IOSTANDARD = "LVCMOS33";
NET "pll20dac_sync_n_o" IOSTANDARD = "LVCMOS33";
NET "pll25dac_din_o" IOSTANDARD = "LVCMOS33";
NET "pll25dac_sclk_o" IOSTANDARD = "LVCMOS33";
NET "pll25dac_din_o" IOSTANDARD = "LVCMOS33";
NET "pll25dac_sclk_o" IOSTANDARD = "LVCMOS33";
NET "pll25dac_sync_n_o" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# SPI FLASH
#----------------------------------------
NET "SPI_NCS_O" LOC = AG27;
NET "SPI_NCS_O" IOSTANDARD = "LVCMOS33";
NET "SPI_SCLK_O" LOC = AG26;
NET "SPI_SCLK_O" IOSTANDARD = "LVCMOS33";
NET "SPI_MOSI_O" LOC = AH26;
NET "SPI_MOSI_O" IOSTANDARD = "LVCMOS33";
NET "SPI_MISO_I" LOC = AH27;
NET "SPI_MISO_I" IOSTANDARD = "LVCMOS33";
NET "spi_ncs_o" LOC = AG27;
NET "spi_sclk_o" LOC = AG26;
NET "spi_mosi_o" LOC = AH26;
NET "spi_miso_i" LOC = AH27;
NET "spi_ncs_o" IOSTANDARD = "LVCMOS33";
NET "spi_sclk_o" IOSTANDARD = "LVCMOS33";
NET "spi_mosi_o" IOSTANDARD = "LVCMOS33";
NET "spi_miso_i" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# UART
#----------------------------------------
NET "uart_txd_o" LOC = U27;
NET "uart_rxd_i" LOC = U25;
NET "uart_txd_o" IOSTANDARD = "LVCMOS33";
NET "uart_rxd_i" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# 1-wire thermoeter + unique ID
# 1-wire thermometer + unique ID
#----------------------------------------
NET "carrier_onewire_b" LOC = AC30;
NET "carrier_onewire_b" IOSTANDARD = "LVCMOS33";
#----------------------------------------
......@@ -431,20 +351,16 @@ NET "carrier_onewire_b" IOSTANDARD = "LVCMOS33";
#----------------------------------------
NET "fp_led_line_oen_o[0]" LOC = AD26;
NET "fp_led_line_oen_o[1]" LOC = AD27;
NET "fp_led_line_o[0]" LOC = AC27;
NET "fp_led_line_o[1]" LOC = AC28;
NET "fp_led_column_o[0]" LOC = AE30;
NET "fp_led_column_o[1]" LOC = AE27;
NET "fp_led_column_o[2]" LOC = AE28;
NET "fp_led_column_o[3]" LOC = AF28;
NET "fp_led_line_oen_o[0]" IOSTANDARD="LVCMOS33";
NET "fp_led_line_oen_o[1]" IOSTANDARD="LVCMOS33";
NET "fp_led_line_o[0]" IOSTANDARD="LVCMOS33";
NET "fp_led_line_o[1]" IOSTANDARD="LVCMOS33";
NET "fp_led_column_o[0]" IOSTANDARD="LVCMOS33";
NET "fp_led_column_o[1]" IOSTANDARD="LVCMOS33";
NET "fp_led_column_o[2]" IOSTANDARD="LVCMOS33";
NET "fp_led_column_o[3]" IOSTANDARD="LVCMOS33";
NET "fp_led_line_o[0]" LOC = AC27;
NET "fp_led_line_o[1]" LOC = AC28;
NET "fp_led_column_o[0]" LOC = AE30;
NET "fp_led_column_o[1]" LOC = AE27;
NET "fp_led_column_o[2]" LOC = AE28;
NET "fp_led_column_o[3]" LOC = AF28;
NET "fp_led_line_oen_o[*]" IOSTANDARD="LVCMOS33";
NET "fp_led_line_o[*]" IOSTANDARD="LVCMOS33";
NET "fp_led_column_o[*]" IOSTANDARD="LVCMOS33";
#----------------------------------------
# Front panel IOs
......@@ -460,6 +376,7 @@ NET "fp_term_en_o[1]" LOC = AB1;
NET "fp_term_en_o[2]" LOC = W5;
NET "fp_term_en_o[3]" LOC = W4;
NET "fp_term_en_o[4]" LOC = V4;
NET "fp_gpio1_o" IOSTANDARD = "LVCMOS33";
NET "fp_gpio2_o" IOSTANDARD = "LVCMOS33";
NET "fp_gpio3_o" IOSTANDARD = "LVCMOS33";
......@@ -467,64 +384,7 @@ NET "fp_gpio4_o" IOSTANDARD = "LVCMOS33";
NET "fp_gpio1_a2b_o" IOSTANDARD = "LVCMOS33";
NET "fp_gpio2_a2b_o" IOSTANDARD = "LVCMOS33";
NET "fp_gpio34_a2b_o" IOSTANDARD = "LVCMOS33";
NET "fp_term_en_o[1]" IOSTANDARD = "LVCMOS33";
NET "fp_term_en_o[2]" IOSTANDARD = "LVCMOS33";
NET "fp_term_en_o[3]" IOSTANDARD = "LVCMOS33";
NET "fp_term_en_o[4]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Debug LEDs
#----------------------------------------
#NET "dbg_led_n_o[4]" LOC = U7;
#NET "dbg_led_n_o[3]" LOC = AG1;
#NET "dbg_led_n_o[2]" LOC = AF1;
#NET "dbg_led_n_o[1]" LOC = R6;
#NET "dbg_led_n_o[4]" IOSTANDARD = "LVCMOS33";
#NET "dbg_led_n_o[3]" IOSTANDARD = "LVCMOS33";
#NET "dbg_led_n_o[2]" IOSTANDARD = "LVCMOS33";
#NET "dbg_led_n_o[1]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Switches and button
#----------------------------------------
#NET "pushbutton_i" LOC = P24;
#NET "noga_i[0]" LOC = AE26;
#NET "noga_i[1]" LOC = P23;
#NET "noga_i[2]" LOC = Y24;
#NET "noga_i[3]" LOC = Y23;
#NET "noga_i[4]" LOC = V23;
#NET "switch_i[0]" LOC = W22;
#NET "switch_i[1]" LOC = W21;
#NET "usega_i" LOC = Y22;
#NET "pushbutton_i" IOSTANDARD = "LVCMOS33";
#NET "noga_i[0]" IOSTANDARD = "LVCMOS33";
#NET "noga_i[1]" IOSTANDARD = "LVCMOS33";
#NET "noga_i[2]" IOSTANDARD = "LVCMOS33";
#NET "noga_i[3]" IOSTANDARD = "LVCMOS33";
#NET "noga_i[4]" IOSTANDARD = "LVCMOS33";
#NET "switch_i[0]" IOSTANDARD = "LVCMOS33";
#NET "switch_i[1]" IOSTANDARD = "LVCMOS33";
#NET "usega_i" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Inter-FPGA lines
#----------------------------------------
#NET "rsvd_b[0]" LOC = AG26;
#NET "rsvd_b[1]" LOC = AH26;
#NET "rsvd_b[2]" LOC = AG27;
#NET "rsvd_b[3]" LOC = AH27;
#NET "rsvd_b[4]" LOC = AK27;
#NET "rsvd_b[5]" LOC = AG28;
#NET "rsvd_b[6]" LOC = AJ28;
#NET "rsvd_b[7]" LOC = AK28;
#NET "rsvd_b[0]" IOSTANDARD = "LVCMOS33";
#NET "rsvd_b[1]" IOSTANDARD = "LVCMOS33";
#NET "rsvd_b[2]" IOSTANDARD = "LVCMOS33";
#NET "rsvd_b[3]" IOSTANDARD = "LVCMOS33";
#NET "rsvd_b[4]" IOSTANDARD = "LVCMOS33";
#NET "rsvd_b[5]" IOSTANDARD = "LVCMOS33";
#NET "rsvd_b[6]" IOSTANDARD = "LVCMOS33";
#NET "rsvd_b[7]" IOSTANDARD = "LVCMOS33";
NET "fp_term_en_o[*]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# PCB revision
......@@ -534,17 +394,15 @@ NET "pcbrev_i[3]" LOC = AE17;
NET "pcbrev_i[2]" LOC = AD18;
NET "pcbrev_i[1]" LOC = AE20;
NET "pcbrev_i[0]" LOC = AD20;
NET "pcbrev_i[4]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[3]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[2]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[1]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[0]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[*]" IOSTANDARD = "LVCMOS25";
#----------------------------------------
# Carrier I2C EEPROM
#----------------------------------------
NET "carrier_scl_b" LOC = AC29;
NET "carrier_sda_b" LOC = AA30;
NET "carrier_scl_b" IOSTANDARD = "LVCMOS33";
NET "carrier_sda_b" IOSTANDARD = "LVCMOS33";
......@@ -552,68 +410,46 @@ NET "carrier_sda_b" IOSTANDARD = "LVCMOS33";
# FMC slots management
#----------------------------------------
NET "fmc_prsnt_m2c_n_i[0]" LOC = N30;
NET "fmc_scl_b[0]" LOC = P28;
NET "fmc_sda_b[0]" LOC = P30;
NET "fmc_prsnt_m2c_n_i[0]" IOSTANDARD = "LVCMOS33";
NET "fmc_scl_b[0]" IOSTANDARD = "LVCMOS33";
NET "fmc_sda_b[0]" IOSTANDARD = "LVCMOS33";
NET "fmc_prsnt_m2c_n_i[1]" LOC = AE29;
NET "fmc_scl_b[1]" LOC = W29;
NET "fmc_sda_b[1]" LOC = V30;
NET "fmc_prsnt_m2c_n_i[1]" IOSTANDARD = "LVCMOS33";
NET "fmc_scl_b[1]" IOSTANDARD = "LVCMOS33";
NET "fmc_sda_b[1]" IOSTANDARD = "LVCMOS33";
NET "fmc_scl_b[0]" LOC = P28;
NET "fmc_scl_b[1]" LOC = W29;
NET "fmc_sda_b[0]" LOC = P30;
NET "fmc_sda_b[1]" LOC = V30;
NET "fmc_prsnt_m2c_n_i[*]" IOSTANDARD = "LVCMOS33";
NET "fmc_scl_b[*]" IOSTANDARD = "LVCMOS33";
NET "fmc_sda_b[*]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# FMC slots
#----------------------------------------
# IO standards
NET "adc_ext_trigger_?_i[*]" IOSTANDARD = "LVDS_25";
NET "adc_dco_?_i[*]" IOSTANDARD = "LVDS_25";
NET "adc_fr_?_i[*]" IOSTANDARD = "LVDS_25";
NET "adc_out?_?_i[*]" IOSTANDARD = "LVDS_25";
NET "adc_spi_din_i[*]" IOSTANDARD = "LVCMOS25";
NET "adc_spi_dout_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_spi_sck_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_spi_cs_adc_n_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_spi_cs_dac?_n_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_gpio_dac_clr_n_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_gpio_led_acq_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_gpio_led_trig_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_gpio_ssr_ch?_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_gpio_si570_oe_o[*]" IOSTANDARD = "LVCMOS25";
NET "adc_si570_scl_b[*]" IOSTANDARD = "LVCMOS25";
NET "adc_si570_sda_b[*]" IOSTANDARD = "LVCMOS25";
NET "adc_one_wire_b[*]" IOSTANDARD = "LVCMOS25";
# FMC0
NET "adc_ext_trigger_n_i[0]" LOC = "A15";
NET "adc_ext_trigger_p_i[0]" LOC = "B15";
NET "adc_dco_n_i[0]" LOC = "A16";
NET "adc_dco_p_i[0]" LOC = "C16";
NET "adc_fr_n_i[0]" LOC = "G21";
NET "adc_fr_p_i[0]" LOC = "H21";
NET "adc_outa_n_i[0]" LOC = "E17";
NET "adc_outa_p_i[0]" LOC = "F17";
NET "adc_outb_n_i[0]" LOC = "G16";
NET "adc_outb_p_i[0]" LOC = "H16";
NET "adc_outa_n_i[1]" LOC = "E19";
NET "adc_outa_p_i[1]" LOC = "F19";
NET "adc_outb_n_i[1]" LOC = "F18";
NET "adc_outb_p_i[1]" LOC = "G18";
NET "adc_outa_n_i[2]" LOC = "K21";
NET "adc_outa_p_i[2]" LOC = "L21";
NET "adc_outb_n_i[2]" LOC = "L20";
NET "adc_outb_p_i[2]" LOC = "M20";
NET "adc_outa_n_i[3]" LOC = "F22";
NET "adc_outa_p_i[3]" LOC = "G22";
NET "adc_outb_n_i[3]" LOC = "L19";
NET "adc_outb_p_i[3]" LOC = "M19";
NET "adc_spi_din_i[0]" LOC = "F11";
NET "adc_spi_dout_o[0]" LOC = "K11";
NET "adc_spi_sck_o[0]" LOC = "L11";