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FMC ADC 100M 14b 4cha - Gateware
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FMC ADC 100M 14b 4cha - Gateware
Commits
b14ac079
Commit
b14ac079
authored
May 03, 2013
by
Matthieu Cattin
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doc: Change some comments in the adc csr wbgen file and re-generate associated doc.
parent
8ac495fc
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4 changed files
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19 additions
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19 deletions
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-19
fmc_adc_100Ms_csr.tex
documentation/manuals/firmware/fmc_adc_100Ms_csr.tex
+3
-3
fmc_adc_100Ms_csr.h
hdl/adc/wb_gen/fmc_adc_100Ms_csr.h
+3
-3
fmc_adc_100Ms_csr.htm
hdl/adc/wb_gen/fmc_adc_100Ms_csr.htm
+10
-10
fmc_adc_100Ms_csr.wb
hdl/adc/wb_gen/fmc_adc_100Ms_csr.wb
+3
-3
No files found.
documentation/manuals/firmware/fmc_adc_100Ms_csr.tex
View file @
b14ac079
...
@@ -117,7 +117,7 @@ Channel 4 offset calibration register
...
@@ -117,7 +117,7 @@ Channel 4 offset calibration register
@tab R/W @tab
@tab R/W @tab
@code
{
FSM
_
CMD
}
@code
{
FSM
_
CMD
}
@tab @code
{
X
}
@tab
@tab @code
{
X
}
@tab
State machine commands
State machine commands
(ignore on read)
@item @code
{
2
}
@item @code
{
2
}
@tab R/W @tab
@tab R/W @tab
@code
{
FMC
_
CLK
_
OE
}
@code
{
FMC
_
CLK
_
OE
}
...
@@ -132,7 +132,7 @@ Offset DACs clear (active low)
...
@@ -132,7 +132,7 @@ Offset DACs clear (active low)
@tab W/O @tab
@tab W/O @tab
@code
{
MAN
_
BITSLIP
}
@code
{
MAN
_
BITSLIP
}
@tab @code
{
X
}
@tab
@tab @code
{
X
}
@tab
Manual serdes bitslip
Manual serdes bitslip
(ignore on read)
@item @code
{
5
}
@item @code
{
5
}
@tab R/W @tab
@tab R/W @tab
@code
{
TEST
_
DATA
_
EN
}
@code
{
TEST
_
DATA
_
EN
}
...
@@ -263,7 +263,7 @@ Writing (anything) to this register generates a software trigger.
...
@@ -263,7 +263,7 @@ Writing (anything) to this register generates a software trigger.
@tab W/O @tab
@tab W/O @tab
@code
{
SW
_
TRIG
}
@code
{
SW
_
TRIG
}
@tab @code
{
X
}
@tab
@tab @code
{
X
}
@tab
Software trigger
Software trigger
(ignore on read)
@end multitable
@end multitable
@multitable @columnfractions 0.15 0.85
@multitable @columnfractions 0.15 0.85
@headitem Field @tab Description
@headitem Field @tab Description
...
...
hdl/adc/wb_gen/fmc_adc_100Ms_csr.h
View file @
b14ac079
...
@@ -3,7 +3,7 @@
...
@@ -3,7 +3,7 @@
* File : fmc_adc_100Ms_csr.h
* File : fmc_adc_100Ms_csr.h
* Author : auto-generated by wbgen2 from fmc_adc_100Ms_csr.wb
* Author : auto-generated by wbgen2 from fmc_adc_100Ms_csr.wb
* Created :
Thu Aug 30 09:41:11 2012
* Created :
Fri May 3 10:49:18 2013
* Standard : ANSI C
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fmc_adc_100Ms_csr.wb
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fmc_adc_100Ms_csr.wb
...
@@ -33,7 +33,7 @@
...
@@ -33,7 +33,7 @@
/* definitions for register: Control register */
/* definitions for register: Control register */
/* definitions for field: State machine commands in reg: Control register */
/* definitions for field: State machine commands
(ignore on read)
in reg: Control register */
#define FMC_ADC_CORE_CTL_FSM_CMD_MASK WBGEN2_GEN_MASK(0, 2)
#define FMC_ADC_CORE_CTL_FSM_CMD_MASK WBGEN2_GEN_MASK(0, 2)
#define FMC_ADC_CORE_CTL_FSM_CMD_SHIFT 0
#define FMC_ADC_CORE_CTL_FSM_CMD_SHIFT 0
#define FMC_ADC_CORE_CTL_FSM_CMD_W(value) WBGEN2_GEN_WRITE(value, 0, 2)
#define FMC_ADC_CORE_CTL_FSM_CMD_W(value) WBGEN2_GEN_WRITE(value, 0, 2)
...
@@ -45,7 +45,7 @@
...
@@ -45,7 +45,7 @@
/* definitions for field: Offset DACs clear (active low) in reg: Control register */
/* definitions for field: Offset DACs clear (active low) in reg: Control register */
#define FMC_ADC_CORE_CTL_OFFSET_DAC_CLR_N WBGEN2_GEN_MASK(3, 1)
#define FMC_ADC_CORE_CTL_OFFSET_DAC_CLR_N WBGEN2_GEN_MASK(3, 1)
/* definitions for field: Manual serdes bitslip in reg: Control register */
/* definitions for field: Manual serdes bitslip
(ignore on read)
in reg: Control register */
#define FMC_ADC_CORE_CTL_MAN_BITSLIP WBGEN2_GEN_MASK(4, 1)
#define FMC_ADC_CORE_CTL_MAN_BITSLIP WBGEN2_GEN_MASK(4, 1)
/* definitions for field: Enable test data in reg: Control register */
/* definitions for field: Enable test data in reg: Control register */
...
...
hdl/adc/wb_gen/fmc_adc_100Ms_csr.htm
View file @
b14ac079
...
@@ -565,7 +565,7 @@ rst_n_i
...
@@ -565,7 +565,7 @@ rst_n_i
→
→
</td>
</td>
<td
class=
"td_pblock_left"
>
<td
class=
"td_pblock_left"
>
wb_clk
_i
clk_sys
_i
</td>
</td>
<td
class=
"td_sym_center"
>
<td
class=
"td_sym_center"
>
...
@@ -582,7 +582,7 @@ fmc_adc_core_ctl_fsm_cmd_o[1:0]
...
@@ -582,7 +582,7 @@ fmc_adc_core_ctl_fsm_cmd_o[1:0]
⇒
⇒
</td>
</td>
<td
class=
"td_pblock_left"
>
<td
class=
"td_pblock_left"
>
wb_ad
d
r_i[4:0]
wb_adr_i[4:0]
</td>
</td>
<td
class=
"td_sym_center"
>
<td
class=
"td_sym_center"
>
...
@@ -599,7 +599,7 @@ fmc_adc_core_ctl_fsm_cmd_wr_o
...
@@ -599,7 +599,7 @@ fmc_adc_core_ctl_fsm_cmd_wr_o
⇒
⇒
</td>
</td>
<td
class=
"td_pblock_left"
>
<td
class=
"td_pblock_left"
>
wb_dat
a
_i[31:0]
wb_dat_i[31:0]
</td>
</td>
<td
class=
"td_sym_center"
>
<td
class=
"td_sym_center"
>
...
@@ -616,7 +616,7 @@ fmc_adc_core_ctl_fmc_clk_oe_o
...
@@ -616,7 +616,7 @@ fmc_adc_core_ctl_fmc_clk_oe_o
⇐
⇐
</td>
</td>
<td
class=
"td_pblock_left"
>
<td
class=
"td_pblock_left"
>
wb_dat
a
_o[31:0]
wb_dat_o[31:0]
</td>
</td>
<td
class=
"td_sym_center"
>
<td
class=
"td_sym_center"
>
...
@@ -715,10 +715,10 @@ fmc_adc_core_ctl_reserved_o[23:0]
...
@@ -715,10 +715,10 @@ fmc_adc_core_ctl_reserved_o[23:0]
</tr>
</tr>
<tr>
<tr>
<td
class=
"td_arrow_left"
>
<td
class=
"td_arrow_left"
>
←
</td>
</td>
<td
class=
"td_pblock_left"
>
<td
class=
"td_pblock_left"
>
wb_stall_o
</td>
</td>
<td
class=
"td_sym_center"
>
<td
class=
"td_sym_center"
>
...
@@ -2773,8 +2773,8 @@ FSM_CMD[1:0]
...
@@ -2773,8 +2773,8 @@ FSM_CMD[1:0]
<ul>
<ul>
<li><b>
<li><b>
FSM_CMD
FSM_CMD
</b>
[
<i>
read/write
</i>
]: State machine commands
</b>
[
<i>
read/write
</i>
]: State machine commands
(ignore on read)
<br>
1:
start
<br>
2: stop
<br>
1:
ACQ_START (start acquisition, only when FSM is idle)
<br>
2: ACQ_STOP (stop acquisition, anytime)
<li><b>
<li><b>
FMC_CLK_OE
FMC_CLK_OE
</b>
[
<i>
read/write
</i>
]: FMC Si750 output enable
</b>
[
<i>
read/write
</i>
]: FMC Si750 output enable
...
@@ -2783,7 +2783,7 @@ OFFSET_DAC_CLR_N
...
@@ -2783,7 +2783,7 @@ OFFSET_DAC_CLR_N
</b>
[
<i>
read/write
</i>
]: Offset DACs clear (active low)
</b>
[
<i>
read/write
</i>
]: Offset DACs clear (active low)
<li><b>
<li><b>
MAN_BITSLIP
MAN_BITSLIP
</b>
[
<i>
write-only
</i>
]: Manual serdes bitslip
</b>
[
<i>
write-only
</i>
]: Manual serdes bitslip
(ignore on read)
<li><b>
<li><b>
TEST_DATA_EN
TEST_DATA_EN
</b>
[
<i>
read/write
</i>
]: Enable test data
</b>
[
<i>
read/write
</i>
]: Enable test data
...
@@ -3869,7 +3869,7 @@ SW_TRIG[7:0]
...
@@ -3869,7 +3869,7 @@ SW_TRIG[7:0]
<ul>
<ul>
<li><b>
<li><b>
SW_TRIG
SW_TRIG
</b>
[
<i>
write-only
</i>
]: Software trigger
</b>
[
<i>
write-only
</i>
]: Software trigger
(ignore on read)
</ul>
</ul>
<a
name=
"SHOTS"
></a>
<a
name=
"SHOTS"
></a>
<h3><a
name=
"sect_3_6"
>
3.6. Number of shots
</a></h3>
<h3><a
name=
"sect_3_6"
>
3.6. Number of shots
</a></h3>
...
...
hdl/adc/wb_gen/fmc_adc_100Ms_csr.wb
View file @
b14ac079
...
@@ -10,7 +10,7 @@ peripheral {
...
@@ -10,7 +10,7 @@ peripheral {
prefix = "ctl";
prefix = "ctl";
field {
field {
name = "State machine commands";
name = "State machine commands
(ignore on read)
";
description = "1: ACQ_START (start acquisition, only when FSM is idle)\n2: ACQ_STOP (stop acquisition, anytime)";
description = "1: ACQ_START (start acquisition, only when FSM is idle)\n2: ACQ_STOP (stop acquisition, anytime)";
prefix = "fsm_cmd";
prefix = "fsm_cmd";
type = PASS_THROUGH;
type = PASS_THROUGH;
...
@@ -36,7 +36,7 @@ peripheral {
...
@@ -36,7 +36,7 @@ peripheral {
};
};
field {
field {
name = "Manual serdes bitslip";
name = "Manual serdes bitslip
(ignore on read)
";
prefix = "man_bitslip";
prefix = "man_bitslip";
type = MONOSTABLE;
type = MONOSTABLE;
clock = "fs_clk_i"
clock = "fs_clk_i"
...
@@ -220,7 +220,7 @@ peripheral {
...
@@ -220,7 +220,7 @@ peripheral {
prefix = "sw_trig";
prefix = "sw_trig";
field {
field {
name = "Software trigger";
name = "Software trigger
(ignore on read)
";
type = PASS_THROUGH;
type = PASS_THROUGH;
size = 32;
size = 32;
clock = "fs_clk_i";
clock = "fs_clk_i";
...
...
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