Commit 9c86f458 authored by Matthieu Cattin's avatar Matthieu Cattin

hdl: Fix some comments.

Add file header to sdb_meta_pkg.vhd
parent 9f8d74a5
...@@ -11,8 +11,6 @@ ...@@ -11,8 +11,6 @@
-- --
-- date: 28-02-2011 -- date: 28-02-2011
-- --
-- version: 1.0
--
-- description: FMC ADC 100Ms/s core. -- description: FMC ADC 100Ms/s core.
-- --
-- dependencies: -- dependencies:
...@@ -33,7 +31,7 @@ ...@@ -33,7 +31,7 @@
-- received a copy of the GNU Lesser General Public License along with this -- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html -- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
-- last changes: see svn log. -- last changes: see git log.
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
-- TODO: - -- TODO: -
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
......
--------------------------------------------------------------------------------
-- CERN (BE-CO-HT)
-- FMC ADC 100Ms/s core
-- http://www.ohwr.org/projects/fmc-adc-100m14b4cha
--------------------------------------------------------------------------------
--
-- unit name: sdb_meta_pkg (sdb_meta_pkg.vhd)
--
-- author: Matthieu Cattin (matthieu.cattin@cern.ch)
--
-- date: 11-03-2013
--
-- description: Sdb meta-information for the FMC ADC 100Ms/s design for SPEC.
--
--------------------------------------------------------------------------------
-- GNU LESSER GENERAL PUBLIC LICENSE
--------------------------------------------------------------------------------
-- This source file is free software; you can redistribute it and/or modify it
-- under the terms of the GNU Lesser General Public License as published by the
-- Free Software Foundation; either version 2.1 of the License, or (at your
-- option) any later version. This source is distributed in the hope that it
-- will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
-- of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-- See the GNU Lesser General Public License for more details. You should have
-- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
--------------------------------------------------------------------------------
-- last changes: see git log.
--------------------------------------------------------------------------------
-- TODO: -
--------------------------------------------------------------------------------
library ieee; library ieee;
use ieee.std_logic_1164.all; use ieee.std_logic_1164.all;
......
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
-- --
-- date: 24-02-2011 -- date: 24-02-2011
-- --
-- version: 1.0 -- version: see sdb_meta_pkg.vhd
-- --
-- description: Top entity of FMC ADC 100Ms/s design for SPEC board. -- description: Top entity of FMC ADC 100Ms/s design for SPEC board.
-- --
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
-- received a copy of the GNU Lesser General Public License along with this -- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html -- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
-- last changes: see svn log. -- last changes: see git log.
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
-- TODO: - -- TODO: -
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
...@@ -883,7 +883,7 @@ begin ...@@ -883,7 +883,7 @@ begin
irq_sources(3) <= acq_end_irq_p; irq_sources(3) <= acq_end_irq_p;
irq_sources(31 downto 4) <= (others => '0'); irq_sources(31 downto 4) <= (others => '0');
-- End of acquisition interrupt generation -- Detects end of adc core writing to ddr
p_ddr_wr_fifo_empty : process (sys_clk_125) p_ddr_wr_fifo_empty : process (sys_clk_125)
begin begin
if rising_edge(sys_clk_125) then if rising_edge(sys_clk_125) then
...@@ -893,6 +893,7 @@ begin ...@@ -893,6 +893,7 @@ begin
ddr_wr_fifo_empty_p <= ddr_wr_fifo_empty and not(ddr_wr_fifo_empty_d); ddr_wr_fifo_empty_p <= ddr_wr_fifo_empty and not(ddr_wr_fifo_empty_d);
-- End of acquisition interrupt generation
p_acq_end : process (sys_clk_125) p_acq_end : process (sys_clk_125)
begin begin
if rising_edge(sys_clk_125) then if rising_edge(sys_clk_125) then
......
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