Add acq FSM states description in .wb

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@76 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

Add acq FSM states description in .wb
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@76 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
3a694fd8 · mcattin · b80794fd · 3a694fd8 · 3a694fd8 · 3a694fd8
Commit 3a694fd8 authored Nov 03, 2011 by mcattin
4 changed files
--- a/hdl/adc/rtl/fmc_adc_100Ms_csr.vhd
+++ b/hdl/adc/rtl/fmc_adc_100Ms_csr.vhd
@@ -3,7 +3,7 @@
 ---------------------------------------------------------------------------------------
 -- File           : ../rtl/fmc_adc_100Ms_csr.vhd
 -- Author         : auto-generated by wbgen2 from fmc_adc_100Ms_csr.wb
-- Created        : Tue Aug 30 19:24:48 2011
+-- Created        : Thu Nov  3 17:06:56 2011
 -- Standard       : VHDL'87
 ---------------------------------------------------------------------------------------
 -- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fmc_adc_100Ms_csr.wb

--- a/hdl/adc/wb_gen/fmc_adc_100Ms_csr.h
+++ b/hdl/adc/wb_gen/fmc_adc_100Ms_csr.h
@@ -3,7 +3,7 @@
  * File           : fmc_adc_100Ms_csr.h
  * Author         : auto-generated by wbgen2 from fmc_adc_100Ms_csr.wb
-  * Created        : Tue Aug 30 19:24:48 2011
+  * Created        : Thu Nov  3 17:06:57 2011
  * Standard       : ANSI C
    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fmc_adc_100Ms_csr.wb

--- a/hdl/adc/wb_gen/fmc_adc_100Ms_csr.htm
+++ b/hdl/adc/wb_gen/fmc_adc_100Ms_csr.htm
@@ -2506,6 +2506,7 @@ FSM[2:0]
 <li><b>
 FSM
 </b>[<i>read-only</i>]: State machine status
+<br>States:<br>1: IDLE<br>2: PRE_TRIG<br>3: WAIT_TRIG<br>4: POST_TRIG<br>5: DECR_SHOT<br>7: Illegal
 <li><b>
 SERDES_PLL
 </b>[<i>read-only</i>]: SerDes PLL status

--- a/hdl/adc/wb_gen/fmc_adc_100Ms_csr.wb
+++ b/hdl/adc/wb_gen/fmc_adc_100Ms_csr.wb
@@ -76,6 +76,7 @@ peripheral {
    field {
      name = "State machine status";
+      description = "States:\n1: IDLE\n2: PRE_TRIG\n3: WAIT_TRIG\n4: POST_TRIG\n5: DECR_SHOT\n7: Illegal";
      prefix = "fsm";
      type = SLV;
      size = 3;