From e35c293d53673c337642df09f78df623ffc7a2e6 Mon Sep 17 00:00:00 2001
From: "Wesley W. Terpstra" <w.terpstra@gsi.de>
Date: Thu, 4 Apr 2013 20:00:24 +0200
Subject: [PATCH] usb: combine etherbone core into usb adapter
---
Manifest.py | 2 +-
hdl/eb_slave_core/Manifest.py | 1 +
hdl/eb_slave_core/eb_usb_slave_core.vhd | 11 ++++++---
hdl/eb_usb_core/ez_usb.vhd | 33 +++++++++++++------------
4 files changed, 27 insertions(+), 20 deletions(-)
diff --git a/Manifest.py b/Manifest.py
index dde11b3..5f0d8f1 100644
--- a/Manifest.py
+++ b/Manifest.py
@@ -1 +1 @@
-modules = { "local": ["hdl/eb_slave_core"] }
+modules = { "local": ["hdl/eb_slave_core", "hdl/eb_usb_core"] }
diff --git a/hdl/eb_slave_core/Manifest.py b/hdl/eb_slave_core/Manifest.py
index 1af7199..b590168 100644
--- a/hdl/eb_slave_core/Manifest.py
+++ b/hdl/eb_slave_core/Manifest.py
@@ -11,4 +11,5 @@ files = [
"sipo_flag.vhd",
"vhdl_2008_workaround_pkg.vhd",
"WB_bus_adapter_streaming_sg.vhd",
+ "eb_usb_slave_core.vhd",
"xetherbone_core.vhd"];
diff --git a/hdl/eb_slave_core/eb_usb_slave_core.vhd b/hdl/eb_slave_core/eb_usb_slave_core.vhd
index 2980d2c..c7e1598 100644
--- a/hdl/eb_slave_core/eb_usb_slave_core.vhd
+++ b/hdl/eb_slave_core/eb_usb_slave_core.vhd
@@ -68,7 +68,7 @@ entity eb_usb_slave_core is
end eb_usb_slave_core;
-architecture behavioral of eb_slave_core is
+architecture behavioral of eb_usb_slave_core is
signal s_status_en : std_logic;
signal s_status_clr : std_logic;
@@ -95,6 +95,8 @@ architecture behavioral of eb_slave_core is
signal s_eb_main_fsm_2_scatter : t_wishbone_slave_in;
signal slim_src_o_dat : std_logic_vector(7 downto 0);
+
+ signal B_SEL_o : std_logic_vector(0 downto 0);
begin
@@ -142,7 +144,7 @@ gather : WB_bus_adapter_streaming_sg generic map (g_adr_width_A => 32,
A_CYC_i => snk_i.cyc,
A_STB_i => snk_i.stb,
A_ADR_i => snk_i.adr,
- A_SEL_i => snk_i.sel,
+ A_SEL_i => snk_i.sel(0 downto 0),
A_WE_i => snk_i.we,
A_DAT_i => snk_i.dat(7 downto 0),
A_ACK_o => snk_o.ack,
@@ -189,7 +191,7 @@ scatter: WB_bus_adapter_streaming_sg generic map (g_adr_width_A => 32,
B_CYC_o => src_o.cyc,
B_STB_o => src_o.stb,
B_ADR_o => src_o.adr,
- B_SEL_o => src_o.sel,
+ B_SEL_o => B_SEL_o,
B_WE_o => src_o.we,
B_DAT_o => slim_src_o_dat,
B_ACK_i => src_i.ack,
@@ -198,6 +200,9 @@ scatter: WB_bus_adapter_streaming_sg generic map (g_adr_width_A => 32,
B_STALL_i => src_i.stall,
B_DAT_i => (others => '0'));
+
+ src_o.sel <= "000" & B_SEL_o;
+
EB : eb_main_fsm
port map(
--general
diff --git a/hdl/eb_usb_core/ez_usb.vhd b/hdl/eb_usb_core/ez_usb.vhd
index 3e1227a..fbc139d 100644
--- a/hdl/eb_usb_core/ez_usb.vhd
+++ b/hdl/eb_usb_core/ez_usb.vhd
@@ -184,6 +184,8 @@ begin
baud_tick_o => baud_tick,
baud8_tick_o => baud8_tick);
+ -- all bytes sent to the device will be delivered reliably
+ -- ... but, of course, the WR LM32 driver drops bytes like mad
U_TX : uart_async_tx -- USB2UART
port map(
clk_sys_i => clk_sys_i,
@@ -199,6 +201,7 @@ begin
usb2uart_uart_o.dat <= (others => '0');
usb2uart_uart_o.int <= '0';
+ -- this will drop bytes once buffers are full (no host connected)
U_RX : uart_async_rx -- UART2USB
port map(
clk_sys_i => clk_sys_i,
@@ -227,21 +230,19 @@ begin
w_master_o => usb2eb_eb_i,
w_master_i => usb2eb_eb_o);
- master_o <= cc_dummy_slave_in;
--- EB : eb_usb_slave_core
--- generic map(
--- g_sdb_address => x"00000000" & g_sdb_address)
--- port map(
--- clk_i => clk_sys_i,
--- nRst_i => rstn_i,
--- snk_i => usb2eb_eb_i,
--- snk_o => usb2eb_eb_o,
--- src_o => eb2usb_m,
--- src_i => eb2usb_s,
--- cfg_slave_o => open,
--- cfg_slave_i => cc_dummy_slave_in,
--- master_o => master_o,
--- master_i => master_i);
+ EB : eb_usb_slave_core
+ generic map(
+ g_sdb_address => x"00000000" & g_sdb_address)
+ port map(
+ clk_i => clk_sys_i,
+ nRst_i => rstn_i,
+ snk_i => usb2eb_eb_i,
+ snk_o => usb2eb_eb_o,
+ src_o => eb2usb_m,
+ src_i => eb2usb_s,
+ cfg_slave_o => open,
+ cfg_slave_i => cc_dummy_slave_in,
+ master_o => master_o,
+ master_i => master_i);
-
end rtl;
--
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